... | ... | @@ -117,6 +117,15 @@ receive from reviewers) |
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## Examples of VHDL design reviews
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- VHDL design review of
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nanoFIP
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- [CodeReview\_24Jan11](https://www.ohwr.org/project/cern-fip/tree/master/trunk/hdl/design/CodeReview_24Jan11)
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- [CodeReview\_14Nov11](https://www.ohwr.org/project/cern-fip/tree/master/trunk/hdl/design/CodeReview_14Nov11)
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## Wishbone bus
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Many Open designs use the Wishbone specification. You may want to
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... | ... | @@ -174,14 +183,5 @@ at CERN, I think they are still valid and useful. |
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## Examples of gateware design reviews
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- VHDL design review of
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nanoFIP
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- [CodeReview\_24Jan11](https://www.ohwr.org/project/cern-fip/tree/master/trunk/hdl/design/CodeReview_24Jan11)
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- [CodeReview\_14Nov11](https://www.ohwr.org/project/cern-fip/tree/master/trunk/hdl/design/CodeReview_14Nov11)
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Erik van der Bij, Maciej Lipinski - 22 February 2017
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Erik van der Bij, Maciej Lipinski - 23 February 2017
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