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DIOT - Distributed IO Tier
DIOT - Distributed IO Tier

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Last edited by Erik van der Bij
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Distributed IO Tier

HL-LHC_WP18

Project description

Distributed I/O Tier - is the level where electronics modules installed close to a particle accelerator in radiation-exposed or radiation-free areas controlled by the master in the Front-end tier over the fieldbus.
These are usually FPGA-based boards sampling digital and analog inputs, driving outputs and performing various safety critical operations.

diot_kit4_scaled

Modular and reusable Distributed I/O Tier hardware kit*

Project information

Modules

Main Kit:

The DI/OT Main Kit provides the following modules which are essential to the DI/OT system and application-independent:

  • DI/OT 3U crate
    Backplanes and crate mechanics designs; the crate is the same for radiation-free and radiation-exposed areas
  • RaToPUS
    100W AC/DC power supply for radiation tolerant DI/OT crate; an off-the-shelf power supply at higher capacity may be used outside of radiation
  • MoniMod
    General-purpose, small form factor monitoring module for RaToPUS and 1U fan tray in radiation-exposed areas
  • DI/OT System Board with ZU7
    A non-radiation-tolerant crate controller with Zynq Ultrascale MPSoC, White Rabbit support and Low Pin Count FMC
  • DI/OT Rad-tol System Board with Igloo2
    A radiation-tolerant crate controller with Flash-based Igloo2 FPGA
  • Communication mezzanines
    A set of FMC mezzanine boards that support different communication protocols: White Rabbit and Profinet for radiation-free areas, Powerlink and WorldFIP for the radiation-exposed ones
  • Hydra
    Hydra is a radiation-tolerant SoC designed to operate up to 500 Gy TID. It features a RISC-V CPU running at 50 MHz, 96 kB of ROM for code, 64 kB of RAM, two Ethernet NIC with low-latency L2 packet switching, SPI and watchdog. Its first use is in the implementation of a Powerlink node using a stripped-down OpenPowerlink stack.

Peripheral Boards:

The Peripheral Boards are application-specific. The DI/OT kit provides a generic SoC-based FMC-carrier Peripheral Board; the application-specific hardware is placed on the FMC-mezzanine and the software/gateware runs on the carrier SoC.

Reliability/Dependability Studies

Documents

Presentations

2021

WP18: radiation-tolerant Distributed I/O Tier platform
G.Daniluk, 11th HL-LHC Collaboration Meeting, 21 Oct 2021

Radiation-tolerant DI/OT developments (Introduction, RaToPUS, System Board, Reliability)
CERN R2E Annual Meeting, 3 Feb 2021

2020

DI/OT developments overview for CERN Cryogenics group
G.Daniluk, J.Serrano, 11 Dec 2020

DI/OT platform: development status and interfaces with CO services (video - CERN access only)
G.Daniluk, E.Gousiou, CERN Technical Meeting, 4 Jun 2020

Papers

Design of a 100W Radiation-Tolerant Power-Factor-Correction Buck AC/DC Converter
paper
Lalit Patnaik, Grzegorz Daniluk, Salvatore Danzeca, PCIM Europe digital days 2020

Low-Cost Modular Platform for Custom Electronics in Radiation-Exposed and Radiation-Free Areas at CERN
paper slides
G.Daniluk, C.Gentsos, E.Gousiou, L.Patnaik, M.Rizzi, Proceedings of ICALEPCS2019, New York, USA

Plans at CERN for electronics and communication in the Distributed I/O Tier
G.Daniluk E.Gousiou, Proceedings of ICALEPCS2017, Barcelona, Spain, ISBN: 9783954501939

Contacts

Status

Date Event
2015 Start of the project at CERN as collaboration to design generic hardware platform for accelerator equipment
2017 DI/OT becomes official work package of HL-LHC project
10-01-20 Created FAQ
01-05-20 First version of crate mechanics and backplanes design finalized, awaiting the prototypes
11-09-20 Non-radiation-tolerant System Board design finalized, awaiting the prototypes
03-12-20 First prototypes of DI/OT crate and backplanes received!
31-03-21 First prototypes of Non-rad-tol System Board received

Files