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DIOT Zynq Ultrascale-based System Board
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DIOT Zynq Ultrascale-based System Board
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SI53312-B-GM reduction
#282
· opened
Nov 27, 2023
by
Filip Świtakowski
v3
Done
Question
CLOSED
2
updated
Mar 01, 2024
MGT connectivity
#281
· opened
Nov 17, 2023
by
Filip Świtakowski
v3
Done
Question
CLOSED
3
updated
Mar 05, 2024
Obsolete components
#278
· opened
Sep 18, 2023
by
Filip Świtakowski
v3
Done
Question
CLOSED
3
updated
Mar 05, 2024
SD Card reader
#275
· opened
May 23, 2023
by
Alén Arias Vázquez
v3
Done
Minor
Question
CLOSED
1
8
updated
Mar 01, 2024
verify power polygons
3 of 3 tasks completed
#221
· opened
Jul 06, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
4
updated
Sep 08, 2020
possible cross-talk between L7, L8?
#220
· opened
Jul 06, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
2
updated
Aug 31, 2020
press-fit tooling
#207
· opened
Jul 03, 2020
by
Paul PERONNARD
layout-v1.0
Done
Question
CLOSED
1
updated
Aug 28, 2020
[BSilk] many components have their designators removed
#193
· opened
Jul 02, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
1
updated
Aug 28, 2020
[L5] X:217mm Y:50.5mm: what's the reason to have this via?
#184
· opened
Jul 02, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
1
updated
Aug 28, 2020
[L1] X:130mm Y:9mm: is there a break between GND polygon and GND pads of IC41?
#177
· opened
Jul 01, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
1
updated
Aug 28, 2020
[L1] what is the role of pads e.g. on WR_DAC lines (DIN, SYNC1, SYNC2, SCLK)?
#174
· opened
Jul 01, 2020
by
Grzegorz Daniluk
layout-v1.0
Question
CLOSED
2
updated
Sep 04, 2020
[General] what is the estimated cost of this board today excluding the FPGA price?
#170
· opened
Jul 01, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
1
updated
Sep 03, 2020
[General] Do we ABSOLUTELY need 0201 capacitors and resistors?
#167
· opened
Jul 01, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
2
updated
Aug 28, 2020
[L6GND] small cutouts placed around certain pins of IC1 (like SRC_CLK_SEL_R) or P2V5 vias next to C297. What are they for?
#164
· opened
Jul 01, 2020
by
Grzegorz Daniluk
layout-v1.0
Question
CLOSED
1
updated
Jul 14, 2020
[General] Clearance rule: do we really need 3 mils?
#152
· opened
Jul 01, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
1
updated
Jul 13, 2020
[General] (X:216mm Y:88.5mm) what's the purpose of that via between backplane P6 connector pins? There is GND pin right next to it.
#147
· opened
Jul 01, 2020
by
Grzegorz Daniluk
layout-v1.0
Done
Question
CLOSED
1
updated
Aug 27, 2020