[clocks] OSC5 comment clarification
What do you mean by the comment at OSC5? Why has to be 50MHz? on AFCZ it's 48MHz, on Xilinx devkit it's 33.333MHz. In principle DS925 says it can be anything between 27MHz-60MHz
What do you mean by the comment at OSC5? Why has to be 50MHz? on AFCZ it's 48MHz, on Xilinx devkit it's 33.333MHz. In principle DS925 says it can be anything between 27MHz-60MHz