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# DIOT Kintex Ultrascale-based Peripheral Board FMC Carrier
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This page gathers the design specification of the FMC carrier Peripheral Board for DI/OT crate. The role of this board is to provide the ability to host FMC mezzanines inside the DI/OT crate. It is equipped with an FPGA that communicates over the DI/OT backplane with a DI/OT System Board using a Multi Gigabit Transceiver (MGT) and provides I/Os to the FMC connector.
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This page gathers the design specification of the FMC carrier Peripheral Board for the [DI/OT](https://ohwr.org/project/diot/wikis) crate. The role of this board is to provide the ability to host FMC mezzanines inside the DI/OT crate. It is equipped with an FPGA that communicates over the DI/OT backplane with a DI/OT System Board using a Multi Gigabit Transceiver (MGT) and provides I/Os to the FMC connector.
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## Specification
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... | ... | @@ -97,6 +97,10 @@ Wherever possible, the same components shall be used as in the [DI/OT ZU7 System |
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* Q: remote FPGA programming, only remote update by writing to flash, or also connect JTAG to backplane lines?
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- A TE/ABT: JTAG to backplane please
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## Documents
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- [DIOT Project](https://ohwr.org/project/diot/wikis)
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## Contacts
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* [Greg Daniluk](mailto:grzegorz.daniluk@cern.ch) - CERN
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