Commit f993f4c6 authored by Adam Wujek's avatar Adam Wujek

bootloader/atmel_start: update autogenerated files to the latest atmel start

Signed-off-by: 's avatarAdam Wujek <dev_public@wujek.eu>
parent 1ef429f0
<environment>
<configurations/>
<device-packs>
<device-pack device="ATSAMD21G18A" name="SAMD21_DFP" vendor="Atmel" version="1.3.331"/>
<device-pack device="ATSAMD21G18A" name="SAMD21_DFP" vendor="Atmel" version="1.3.395"/>
</device-packs>
</environment>
......@@ -27,16 +27,16 @@ endif
# List the subdirectories for creating object files
SUB_DIRS += \
\
samd21a/armcc/Device/SAMD21A/Source \
hpl/dmac \
samd21a/armcc/Device/SAMD21/Source \
hal/src \
hpl/pm \
samd21a/armcc/Device/SAMD21/Source/ARM \
hpl/sysctrl \
hal/utils/src \
hpl/sercom \
examples \
hpl/gclk \
samd21a/armcc/Device/SAMD21A/Source/ARM \
hpl/core
# List the object files
......@@ -44,6 +44,7 @@ OBJS += \
hal/src/hal_io.o \
hal/src/hal_i2c_s_async.o \
hal/src/hal_delay.o \
samd21a/armcc/Device/SAMD21A/Source/system_samd21.o \
hpl/pm/hpl_pm.o \
hpl/core/hpl_init.o \
hal/utils/src/utils_list.o \
......@@ -53,11 +54,10 @@ hpl/dmac/hpl_dmac.o \
hpl/sysctrl/hpl_sysctrl.o \
hpl/gclk/hpl_gclk.o \
hal/src/hal_init.o \
samd21a/armcc/Device/SAMD21/Source/ARM/startup_SAMD21.o \
main.o \
examples/driver_examples.o \
driver_init.o \
samd21a/armcc/Device/SAMD21/Source/system_samd21.o \
samd21a/armcc/Device/SAMD21A/Source/ARM/startup_SAMD21.o \
hpl/sercom/hpl_sercom.o \
hal/utils/src/utils_ringbuffer.o \
hal/src/hal_gpio.o \
......@@ -70,6 +70,7 @@ OBJS_AS_ARGS += \
"hal/src/hal_io.o" \
"hal/src/hal_i2c_s_async.o" \
"hal/src/hal_delay.o" \
"samd21a/armcc/Device/SAMD21A/Source/system_samd21.o" \
"hpl/pm/hpl_pm.o" \
"hpl/core/hpl_init.o" \
"hal/utils/src/utils_list.o" \
......@@ -79,11 +80,10 @@ OBJS_AS_ARGS += \
"hpl/sysctrl/hpl_sysctrl.o" \
"hpl/gclk/hpl_gclk.o" \
"hal/src/hal_init.o" \
"samd21a/armcc/Device/SAMD21/Source/ARM/startup_SAMD21.o" \
"main.o" \
"examples/driver_examples.o" \
"driver_init.o" \
"samd21a/armcc/Device/SAMD21/Source/system_samd21.o" \
"samd21a/armcc/Device/SAMD21A/Source/ARM/startup_SAMD21.o" \
"hpl/sercom/hpl_sercom.o" \
"hal/utils/src/utils_ringbuffer.o" \
"hal/src/hal_gpio.o" \
......@@ -99,16 +99,15 @@ DEPS_AS_ARGS += \
"hal/src/hal_gpio.d" \
"hal/src/hal_io.d" \
"hal/src/hal_i2c_s_async.d" \
"samd21a/armcc/Device/SAMD21/Source/system_samd21.d" \
"hpl/core/hpl_core_m0plus_base.d" \
"hal/utils/src/utils_list.d" \
"hpl/dmac/hpl_dmac.d" \
"hal/utils/src/utils_assert.d" \
"samd21a/armcc/Device/SAMD21A/Source/system_samd21.d" \
"hal/src/hal_delay.d" \
"hpl/core/hpl_init.d" \
"hpl/sysctrl/hpl_sysctrl.d" \
"hpl/gclk/hpl_gclk.d" \
"samd21a/armcc/Device/SAMD21/Source/ARM/startup_SAMD21.d" \
"hal/src/hal_init.d" \
"driver_init.d" \
"main.d" \
......@@ -116,6 +115,7 @@ DEPS_AS_ARGS += \
"hal/src/hal_sleep.d" \
"hal/utils/src/utils_ringbuffer.d" \
"hpl/sercom/hpl_sercom.d" \
"samd21a/armcc/Device/SAMD21A/Source/ARM/startup_SAMD21.d" \
"hal/utils/src/utils_event.d" \
"hal/src/hal_atomic.d" \
"hpl/pm/hpl_pm.d" \
......
......@@ -2,12 +2,17 @@ format_version: '2'
name: My Project
versions:
api: '1.0'
backend: 1.6.148
commit: 605f106ab95776472e3febf2fac2471441fb1816
content: 1.0.1600
content_pack_name: acme-packs-all
backend: 1.8.580
commit: f3d8d96e294de8dee688333bbbe8d8458a4f6b4c
content: unknown
content_pack_name: unknown
format: '2'
frontend: 1.6.1881
frontend: 1.8.580
packs_version_avr8: 1.0.1463
packs_version_qtouch: unknown
packs_version_sam: 1.0.1726
version_backend: 1.8.580
version_frontend: ''
board:
identifier: CustomBoard
device: SAMD21G18A-MF
......@@ -21,14 +26,34 @@ drivers:
functionality: System
api: HAL:HPL:GCLK
configuration:
$input: 400000
$input_id: External Crystal Oscillator 0.4-32MHz (XOSC)
RESERVED_InputFreq: 400000
RESERVED_InputFreq_id: External Crystal Oscillator 0.4-32MHz (XOSC)
_$freq_output_Generic clock generator 0: 48000000
_$freq_output_Generic clock generator 1: 32768
_$freq_output_Generic clock generator 2: 48000000
_$freq_output_Generic clock generator 3: 400000
_$freq_output_Generic clock generator 4: 400000
_$freq_output_Generic clock generator 5: 400000
_$freq_output_Generic clock generator 6: 400000
_$freq_output_Generic clock generator 7: 400000
enable_gclk_gen_0: true
enable_gclk_gen_0__externalclock: 1000000
enable_gclk_gen_1: true
enable_gclk_gen_1__externalclock: 1000000
enable_gclk_gen_2: true
enable_gclk_gen_2__externalclock: 1000000
enable_gclk_gen_3: true
enable_gclk_gen_3__externalclock: 1000000
enable_gclk_gen_4: false
enable_gclk_gen_4__externalclock: 1000000
enable_gclk_gen_5: false
enable_gclk_gen_5__externalclock: 1000000
enable_gclk_gen_6: false
enable_gclk_gen_6__externalclock: 1000000
enable_gclk_gen_7: false
enable_gclk_gen_7__externalclock: 1000000
gclk_arch_gen_0_RUNSTDBY: false
gclk_arch_gen_0_enable: true
gclk_arch_gen_0_idc: false
......@@ -103,6 +128,11 @@ drivers:
functionality: System
api: HAL:HPL:PM
configuration:
$input: 48000000
$input_id: Generic clock generator 0
RESERVED_InputFreq: 48000000
RESERVED_InputFreq_id: Generic clock generator 0
_$freq_output_CPU: 48000000
apba_div: '1'
apbb_div: '1'
apbc_div: '1'
......@@ -447,6 +477,14 @@ drivers:
functionality: System
api: HAL:HPL:SYSCTRL
configuration:
$input: 32768
$input_id: Generic clock generator 1
RESERVED_InputFreq: 32768
RESERVED_InputFreq_id: Generic clock generator 1
_$freq_output_8MHz Internal Oscillator (OSC8M): 1000000
_$freq_output_Digital Frequency Locked Loop (DFLL48M): 48000000
_$freq_output_External Crystal Oscillator 0.4-32MHz (XOSC): 400000
_$freq_output_Fractional Digital Phase Locked Loop (FDPLL96M): 47998976
dfll48m_arch_bplckc: false
dfll48m_arch_calibration: false
dfll48m_arch_ccdis: true
......@@ -551,3 +589,4 @@ pads:
user_label: ADDR0
configuration: null
toolchain_options: []
static_files: []
......@@ -142,7 +142,7 @@
// <i> This defines the clock source for generic clock generator 1
// <id> gclk_gen_1_oscillator
#ifndef CONF_GCLK_GEN_1_SRC
#define CONF_GCLK_GEN_1_SRC GCLK_GENCTRL_SRC_XOSC
#define CONF_GCLK_GEN_1_SRC GCLK_GENCTRL_SRC_XOSC32K
#endif
// </h>
......@@ -151,7 +151,7 @@
// <i>
// <id> gclk_gen_1_div
#ifndef CONF_GCLK_GEN_1_DIV
#define CONF_GCLK_GEN_1_DIV 256
#define CONF_GCLK_GEN_1_DIV 1
#endif
// </h>
......
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
ifdef SystemRoot
SHELL = cmd.exe
MK_DIR = mkdir
else
ifeq ($(shell uname), Linux)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), CYGWIN)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), MINGW32)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), MINGW64)
MK_DIR = mkdir -p
endif
ifeq ($(shell uname | cut -d _ -f 1), DARWIN)
MK_DIR = mkdir -p
endif
endif
# List the subdirectories for creating object files
SUB_DIRS += \
\
samd21a/gcc/gcc \
hpl/dmac \
hal/src \
samd21a/gcc \
hpl/pm \
hpl/sysctrl \
hal/utils/src \
hpl/sercom \
examples \
hpl/gclk \
hpl/core
# List the object files
OBJS += \
hal/src/hal_io.o \
samd21a/gcc/gcc/startup_samd21.o \
hal/src/hal_i2c_s_async.o \
hal/utils/src/utils_syscalls.o \
hal/src/hal_delay.o \
hpl/pm/hpl_pm.o \
hpl/core/hpl_init.o \
hal/utils/src/utils_list.o \
hpl/core/hpl_core_m0plus_base.o \
hal/utils/src/utils_assert.o \
hpl/dmac/hpl_dmac.o \
hpl/sysctrl/hpl_sysctrl.o \
hpl/gclk/hpl_gclk.o \
hal/src/hal_init.o \
main.o \
samd21a/gcc/system_samd21.o \
examples/driver_examples.o \
driver_init.o \
hpl/sercom/hpl_sercom.o \
hal/utils/src/utils_ringbuffer.o \
hal/src/hal_gpio.o \
hal/utils/src/utils_event.o \
hal/src/hal_sleep.o \
atmel_start.o \
hal/src/hal_atomic.o
OBJS_AS_ARGS += \
"hal/src/hal_io.o" \
"samd21a/gcc/gcc/startup_samd21.o" \
"hal/src/hal_i2c_s_async.o" \
"hal/utils/src/utils_syscalls.o" \
"hal/src/hal_delay.o" \
"hpl/pm/hpl_pm.o" \
"hpl/core/hpl_init.o" \
"hal/utils/src/utils_list.o" \
"hpl/core/hpl_core_m0plus_base.o" \
"hal/utils/src/utils_assert.o" \
"hpl/dmac/hpl_dmac.o" \
"hpl/sysctrl/hpl_sysctrl.o" \
"hpl/gclk/hpl_gclk.o" \
"hal/src/hal_init.o" \
"main.o" \
"samd21a/gcc/system_samd21.o" \
"examples/driver_examples.o" \
"driver_init.o" \
"hpl/sercom/hpl_sercom.o" \
"hal/utils/src/utils_ringbuffer.o" \
"hal/src/hal_gpio.o" \
"hal/utils/src/utils_event.o" \
"hal/src/hal_sleep.o" \
"atmel_start.o" \
"hal/src/hal_atomic.o"
# List the directories containing header files
DIR_INCLUDES += \
-I"../" \
-I"../config" \
-I"../examples" \
-I"../hal/include" \
-I"../hal/utils/include" \
-I"../hpl/core" \
-I"../hpl/dmac" \
-I"../hpl/gclk" \
-I"../hpl/pm" \
-I"../hpl/port" \
-I"../hpl/sercom" \
-I"../hpl/sysctrl" \
-I"../hri" \
-I"../" \
-I"../CMSIS/Core/Include" \
-I"../samd21a/include"
# List the dependency files
DEPS := $(OBJS:%.o=%.d)
DEPS_AS_ARGS += \
"samd21a/gcc/gcc/startup_samd21.d" \
"hal/src/hal_gpio.d" \
"hal/src/hal_io.d" \
"hal/src/hal_i2c_s_async.d" \
"hal/utils/src/utils_syscalls.d" \
"hpl/core/hpl_core_m0plus_base.d" \
"hal/utils/src/utils_list.d" \
"hpl/dmac/hpl_dmac.d" \
"hal/utils/src/utils_assert.d" \
"hal/src/hal_delay.d" \
"hpl/core/hpl_init.d" \
"hpl/sysctrl/hpl_sysctrl.d" \
"hpl/gclk/hpl_gclk.d" \
"hal/src/hal_init.d" \
"driver_init.d" \
"samd21a/gcc/system_samd21.d" \
"main.d" \
"examples/driver_examples.d" \
"hal/src/hal_sleep.d" \
"hal/utils/src/utils_ringbuffer.d" \
"hpl/sercom/hpl_sercom.d" \
"hal/utils/src/utils_event.d" \
"hal/src/hal_atomic.d" \
"hpl/pm/hpl_pm.d" \
"atmel_start.d"
OUTPUT_FILE_NAME :=AtmelStart
QUOTE := "
OUTPUT_FILE_PATH +=$(OUTPUT_FILE_NAME).elf
OUTPUT_FILE_PATH_AS_ARGS +=$(OUTPUT_FILE_NAME).elf
vpath %.c ../
vpath %.s ../
vpath %.S ../
# All Target
all: $(SUB_DIRS) $(OUTPUT_FILE_PATH)
# Linker target
$(OUTPUT_FILE_PATH): $(OBJS)
@echo Building target: $@
@echo Invoking: ARM/GNU Linker
$(QUOTE)arm-none-eabi-gcc$(QUOTE) -o $(OUTPUT_FILE_NAME).elf $(OBJS_AS_ARGS) -Wl,--start-group -lm -Wl,--end-group -mthumb \
-Wl,-Map="$(OUTPUT_FILE_NAME).map" --specs=nano.specs -Wl,--gc-sections -mcpu=cortex-m0plus \
\
-T"../samd21a/gcc/gcc/samd21g18a_flash.ld" \
-L"../samd21a/gcc/gcc"
@echo Finished building target: $@
"arm-none-eabi-objcopy" -O binary "$(OUTPUT_FILE_NAME).elf" "$(OUTPUT_FILE_NAME).bin"
"arm-none-eabi-objcopy" -O ihex -R .eeprom -R .fuse -R .lock -R .signature \
"$(OUTPUT_FILE_NAME).elf" "$(OUTPUT_FILE_NAME).hex"
"arm-none-eabi-objcopy" -j .eeprom --set-section-flags=.eeprom=alloc,load --change-section-lma \
.eeprom=0 --no-change-warnings -O binary "$(OUTPUT_FILE_NAME).elf" \
"$(OUTPUT_FILE_NAME).eep" || exit 0
"arm-none-eabi-objdump" -h -S "$(OUTPUT_FILE_NAME).elf" > "$(OUTPUT_FILE_NAME).lss"
"arm-none-eabi-size" "$(OUTPUT_FILE_NAME).elf"
# Compiler targets
%.o: %.c
@echo Building file: $<
@echo ARM/GNU C Compiler
$(QUOTE)arm-none-eabi-gcc$(QUOTE) -x c -mthumb -DDEBUG -Os -ffunction-sections -mlong-calls -g3 -Wall -c -std=gnu99 \
-D__SAMD21G18A__ -mcpu=cortex-m0plus \
$(DIR_INCLUDES) \
-MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
@echo Finished building: $<
%.o: %.s
@echo Building file: $<
@echo ARM/GNU Assembler
$(QUOTE)arm-none-eabi-as$(QUOTE) -x c -mthumb -DDEBUG -Os -ffunction-sections -mlong-calls -g3 -Wall -c -std=gnu99 \
-D__SAMD21G18A__ -mcpu=cortex-m0plus \
$(DIR_INCLUDES) \
-MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
@echo Finished building: $<
%.o: %.S
@echo Building file: $<
@echo ARM/GNU Preprocessing Assembler
$(QUOTE)arm-none-eabi-gcc$(QUOTE) -x c -mthumb -DDEBUG -Os -ffunction-sections -mlong-calls -g3 -Wall -c -std=gnu99 \
-D__SAMD21G18A__ -mcpu=cortex-m0plus \
$(DIR_INCLUDES) \
-MD -MP -MF "$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -o "$@" "$<"
@echo Finished building: $<
# Detect changes in the dependent files and recompile the respective object files.
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(DEPS)),)
-include $(DEPS)
endif
endif
$(SUB_DIRS):
$(MK_DIR) "$@"
clean:
rm -f $(OBJS_AS_ARGS)
rm -f $(OUTPUT_FILE_PATH)
rm -f $(DEPS_AS_ARGS)
rm -f $(OUTPUT_FILE_NAME).a $(OUTPUT_FILE_NAME).hex $(OUTPUT_FILE_NAME).bin \
$(OUTPUT_FILE_NAME).lss $(OUTPUT_FILE_NAME).eep $(OUTPUT_FILE_NAME).map \
$(OUTPUT_FILE_NAME).srec
\ No newline at end of file
......@@ -216,7 +216,6 @@ static inline void _dmac_handler(void)
hri_dmac_write_CHID_reg(DMAC, channel);
flag_status = hri_dmac_get_CHINTFLAG_reg(DMAC, DMAC_CHINTFLAG_MASK);
hri_dmac_write_CHID_reg(DMAC, current_channel);
if (flag_status & DMAC_CHINTFLAG_TERR) {
hri_dmac_clear_CHINTFLAG_TERR_bit(DMAC);
......@@ -225,6 +224,7 @@ static inline void _dmac_handler(void)
hri_dmac_clear_CHINTFLAG_TCMPL_bit(DMAC);
tmp_resource->dma_cb.transfer_done(tmp_resource);
}
hri_dmac_write_CHID_reg(DMAC, current_channel);
}
/**
......
......@@ -1672,6 +1672,12 @@ static struct i2cs_configuration _i2css[] = {
#if CONF_SERCOM_5_I2CS_ENABLE == 1
I2CS_CONFIGURATION(5),
#endif
#if CONF_SERCOM_6_I2CS_ENABLE == 1
I2CS_CONFIGURATION(6),
#endif
#if CONF_SERCOM_7_I2CS_ENABLE == 1
I2CS_CONFIGURATION(7),
#endif
};
#endif
......@@ -1713,6 +1719,10 @@ int32_t _i2c_s_async_init(struct _i2c_s_async_device *const device, void *const
NVIC_ClearPendingIRQ((IRQn_Type)_sercom_get_irq_num(hw));
NVIC_EnableIRQ((IRQn_Type)_sercom_get_irq_num(hw));
// Enable Address Match and PREC interrupt by default.
hri_sercomi2cs_set_INTEN_AMATCH_bit(hw);
hri_sercomi2cs_set_INTEN_PREC_bit(hw);
return ERR_NONE;
}
......@@ -1910,12 +1920,19 @@ int32_t _i2c_s_async_set_irq_state(struct _i2c_s_async_device *const device, con
static void _sercom_i2c_s_irq_handler(struct _i2c_s_async_device *device)
{
void * hw = device->hw;
uint32_t flags = hri_sercomi2cm_read_INTFLAG_reg(hw);
uint32_t flags = hri_sercomi2cs_read_INTFLAG_reg(hw);
if (flags & SERCOM_I2CS_INTFLAG_ERROR) {
ASSERT(device->cb.error);
device->cb.error(device);
} else if (flags & SERCOM_I2CS_INTFLAG_DRDY) {
}
if (flags & SERCOM_I2CS_INTFLAG_AMATCH) {
hri_sercomi2cs_clear_INTFLAG_AMATCH_bit(hw);
}
if (flags & SERCOM_I2CS_INTFLAG_PREC) {
hri_sercomi2cs_clear_INTFLAG_PREC_bit(hw);
}
if (flags & SERCOM_I2CS_INTFLAG_DRDY) {
if (!hri_sercomi2cs_get_STATUS_DIR_bit(hw)) {
ASSERT(device->cb.rx_done);
device->cb.rx_done(device, hri_sercomi2cs_read_DATA_reg(hw));
......@@ -1923,6 +1940,7 @@ static void _sercom_i2c_s_irq_handler(struct _i2c_s_async_device *device)
ASSERT(device->cb.tx);
device->cb.tx(device);
}
hri_sercomi2cs_clear_INTFLAG_DRDY_bit(hw);
#if (CONF_MCLK_LPDIV) != (CONF_MCLK_CPUDIV)
/* Adding grace time while waiting for SCL line to be released */
hri_sercomi2cs_clear_STATUS_reg(hw, 0);
......
......@@ -3,7 +3,7 @@
*
* \brief Component version header file
*
* Copyright (c) 2018 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.
* Copyright (c) 2019 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.
*
* \license_start
*
......@@ -43,7 +43,7 @@
// The build number does not refer to the component, but to the build number
// of the device pack that provides the component.
//
#define BUILD_NUMBER 331
#define BUILD_NUMBER 395
//
// The COMPONENT_VERSION_STRING is a string (enclosed in ") that can be used for logging or embedding.
......@@ -58,7 +58,7 @@
// "%Y-%m-%d %H:%M:%S"
//
//
#define COMPONENT_DATE_STRING "2018-08-17 08:46:55"
#define COMPONENT_DATE_STRING "2019-09-19 13:04:38"
#endif/* #ifndef _COMPONENT_VERSION_H_INCLUDED */
......@@ -3,7 +3,7 @@
*
* \brief Top level header file
*
* Copyright (c) 2018 Microchip Technology Inc.
* Copyright (c) 2019 Microchip Technology Inc.
*
* \license_start
*
......@@ -30,34 +30,34 @@
#ifndef _SAM_
#define _SAM_
#if defined(__SAMD21E15A__) || defined(__ATSAMD21E15A__)
#include "samd21e15a.h"
#elif defined(__SAMD21E16A__) || defined(__ATSAMD21E16A__)
#if defined(__SAMD21E16A__) || defined(__ATSAMD21E16A__)
#include "samd21e16a.h"
#elif defined(__SAMD21E17A__) || defined(__ATSAMD21E17A__)
#include "samd21e17a.h"
#elif defined(__SAMD21E18A__) || defined(__ATSAMD21E18A__)
#include "samd21e18a.h"
#elif defined(__SAMD21G15A__) || defined(__ATSAMD21G15A__)
#include "samd21g15a.h"
#elif defined(__SAMD21G16A__) || defined(__ATSAMD21G16A__)
#include "samd21g16a.h"
#elif defined(__SAMD21J16A__) || defined(__ATSAMD21J16A__)
#include "samd21j16a.h"
#elif defined(__SAMD21E15A__) || defined(__ATSAMD21E15A__)
#include "samd21e15a.h"
#elif defined(__SAMD21J18A__) || defined(__ATSAMD21J18A__)
#include "samd21j18a.h"
#elif defined(__SAMD21G17A__) || defined(__ATSAMD21G17A__)
#include "samd21g17a.h"
#elif defined(__SAMD21G17AU__) || defined(__ATSAMD21G17AU__)
#include "samd21g17au.h"
#elif defined(__SAMD21G18A__) || defined(__ATSAMD21G18A__)
#include "samd21g18a.h"
#elif defined(__SAMD21G18AU__) || defined(__ATSAMD21G18AU__)
#include "samd21g18au.h"
#elif defined(__SAMD21J15A__) || defined(__ATSAMD21J15A__)
#include "samd21j15a.h"
#elif defined(__SAMD21J16A__) || defined(__ATSAMD21J16A__)
#include "samd21j16a.h"
#elif defined(__SAMD21G16A__) || defined(__ATSAMD21G16A__)
#include "samd21g16a.h"
#elif defined(__SAMD21G15A__) || defined(__ATSAMD21G15A__)
#include "samd21g15a.h"
#elif defined(__SAMD21J17A__) || defined(__ATSAMD21J17A__)
#include "samd21j17a.h"
#elif defined(__SAMD21J18A__) || defined(__ATSAMD21J18A__)
#include "samd21j18a.h"
#elif defined(__SAMD21G17AU__) || defined(__ATSAMD21G17AU__)
#include "samd21g17au.h"
#elif defined(__SAMD21E17A__) || defined(__ATSAMD21E17A__)
#include "samd21e17a.h"
#elif defined(__SAMD21G18AU__) || defined(__ATSAMD21G18AU__)
#include "samd21g18au.h"
#elif defined(__SAMD21E18A__) || defined(__ATSAMD21E18A__)
#include "samd21e18a.h"
#elif defined(__SAMD21G18A__) || defined(__ATSAMD21G18A__)
#include "samd21g18a.h"
#else
#error Library does not support the specified device
#endif
......
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