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DIOT Monitoring Module
DIOT Monitoring Module
Commit 8adb9ab3 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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test_master: update Atmel Start

parent 8686196d
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    test_master/atmel_start_prj/AtmelStart.env_conf
    View file @ 8adb9ab3
    <environment>
    <configurations/>
    <device-packs>
    <device-pack device="ATSAMD21G18A" name="SAMD21_DFP" vendor="Atmel" version="1.3.331"/>
    <device-pack device="ATSAMD21G18A" name="SAMD21_DFP" vendor="Atmel" version="1.3.395"/>
    </device-packs>
    </environment>
    test_master/atmel_start_prj/armcc/Makefile
    View file @ 8adb9ab3
    ......@@ -31,16 +31,16 @@ hpl/adc \
    usb/class/cdc/device \
    hpl/systick \
    hpl/dmac \
    samd21a/armcc/Device/SAMD21/Source \
    hal/src \
    samd21a/armcc/Device/SAMD21A/Source \
    hpl/pm \
    samd21a/armcc/Device/SAMD21/Source/ARM \
    hpl/sysctrl \
    hal/utils/src \
    hpl/sercom \
    examples \
    hpl/gclk \
    usb \
    samd21a/armcc/Device/SAMD21A/Source/ARM \
    hpl/usb \
    hpl/core \
    usb/device
    ......@@ -53,6 +53,7 @@ usb/class/cdc/device/cdcdf_acm.o \
    hpl/usb/hpl_usb.o \
    hal/src/hal_i2c_m_sync.o \
    hal/src/hal_delay.o \
    samd21a/armcc/Device/SAMD21A/Source/system_samd21.o \
    hpl/pm/hpl_pm.o \
    hpl/core/hpl_init.o \
    hal/utils/src/utils_list.o \
    ......@@ -63,13 +64,12 @@ hpl/sysctrl/hpl_sysctrl.o \
    hpl/gclk/hpl_gclk.o \
    usb/usb_protocol.o \
    hal/src/hal_init.o \
    samd21a/armcc/Device/SAMD21/Source/ARM/startup_SAMD21.o \
    hal/src/hal_usb_device.o \
    main.o \
    examples/driver_examples.o \
    driver_init.o \
    samd21a/armcc/Device/SAMD21/Source/system_samd21.o \
    hal/src/hal_adc_sync.o \
    samd21a/armcc/Device/SAMD21A/Source/ARM/startup_SAMD21.o \
    hpl/sercom/hpl_sercom.o \
    hal/src/hal_gpio.o \
    hal/utils/src/utils_event.o \
    ......@@ -87,6 +87,7 @@ OBJS_AS_ARGS += \
    "hpl/usb/hpl_usb.o" \
    "hal/src/hal_i2c_m_sync.o" \
    "hal/src/hal_delay.o" \
    "samd21a/armcc/Device/SAMD21A/Source/system_samd21.o" \
    "hpl/pm/hpl_pm.o" \
    "hpl/core/hpl_init.o" \
    "hal/utils/src/utils_list.o" \
    ......@@ -97,13 +98,12 @@ OBJS_AS_ARGS += \
    "hpl/gclk/hpl_gclk.o" \
    "usb/usb_protocol.o" \
    "hal/src/hal_init.o" \
    "samd21a/armcc/Device/SAMD21/Source/ARM/startup_SAMD21.o" \
    "hal/src/hal_usb_device.o" \
    "main.o" \
    "examples/driver_examples.o" \
    "driver_init.o" \
    "samd21a/armcc/Device/SAMD21/Source/system_samd21.o" \
    "hal/src/hal_adc_sync.o" \
    "samd21a/armcc/Device/SAMD21A/Source/ARM/startup_SAMD21.o" \
    "hpl/sercom/hpl_sercom.o" \
    "hal/src/hal_gpio.o" \
    "hal/utils/src/utils_event.o" \
    ......@@ -122,14 +122,13 @@ DEPS_AS_ARGS += \
    "hal/src/hal_io.d" \
    "hpl/systick/hpl_systick.d" \
    "usb/class/cdc/device/cdcdf_acm.d" \
    "samd21a/armcc/Device/SAMD21/Source/ARM/startup_SAMD21.d" \
    "hal/src/hal_i2c_m_sync.d" \
    "hpl/usb/hpl_usb.d" \
    "samd21a/armcc/Device/SAMD21/Source/system_samd21.d" \
    "hpl/core/hpl_core_m0plus_base.d" \
    "hal/utils/src/utils_list.d" \
    "hpl/dmac/hpl_dmac.d" \
    "hal/utils/src/utils_assert.d" \
    "samd21a/armcc/Device/SAMD21A/Source/system_samd21.d" \
    "hal/src/hal_delay.d" \
    "hpl/core/hpl_init.d" \
    "hpl/sysctrl/hpl_sysctrl.d" \
    ......@@ -144,6 +143,7 @@ DEPS_AS_ARGS += \
    "examples/driver_examples.d" \
    "hal/src/hal_sleep.d" \
    "hpl/sercom/hpl_sercom.d" \
    "samd21a/armcc/Device/SAMD21A/Source/ARM/startup_SAMD21.d" \
    "hal/src/hal_gpio.d" \
    "hal/src/hal_atomic.d" \
    "usb/device/usbdc.d" \
    ......
    test_master/atmel_start_prj/atmel_start_config.atstart
    View file @ 8adb9ab3
    ......@@ -2,12 +2,17 @@ format_version: '2'
    name: My Project
    versions:
    api: '1.0'
    backend: 1.6.148
    commit: 605f106ab95776472e3febf2fac2471441fb1816
    content: 1.0.1582
    content_pack_name: acme-packs-all
    backend: 1.8.580
    commit: f3d8d96e294de8dee688333bbbe8d8458a4f6b4c
    content: unknown
    content_pack_name: unknown
    format: '2'
    frontend: 1.6.1878
    frontend: 1.8.580
    packs_version_avr8: 1.0.1463
    packs_version_qtouch: unknown
    packs_version_sam: 1.0.1726
    version_backend: 1.8.580
    version_frontend: ''
    board:
    identifier: CustomBoard
    device: SAMD21G18A-MF
    ......@@ -142,14 +147,34 @@ drivers:
    functionality: System
    api: HAL:HPL:GCLK
    configuration:
    $input: 400000
    $input_id: External Crystal Oscillator 0.4-32MHz (XOSC)
    RESERVED_InputFreq: 400000
    RESERVED_InputFreq_id: External Crystal Oscillator 0.4-32MHz (XOSC)
    _$freq_output_Generic clock generator 0: 48000000
    _$freq_output_Generic clock generator 1: 32768
    _$freq_output_Generic clock generator 2: 48000000
    _$freq_output_Generic clock generator 3: 400000
    _$freq_output_Generic clock generator 4: 400000
    _$freq_output_Generic clock generator 5: 400000
    _$freq_output_Generic clock generator 6: 400000
    _$freq_output_Generic clock generator 7: 400000
    enable_gclk_gen_0: true
    enable_gclk_gen_0__externalclock: 1000000
    enable_gclk_gen_1: true
    enable_gclk_gen_1__externalclock: 1000000
    enable_gclk_gen_2: true
    enable_gclk_gen_2__externalclock: 1000000
    enable_gclk_gen_3: true
    enable_gclk_gen_3__externalclock: 1000000
    enable_gclk_gen_4: false
    enable_gclk_gen_4__externalclock: 1000000
    enable_gclk_gen_5: false
    enable_gclk_gen_5__externalclock: 1000000
    enable_gclk_gen_6: false
    enable_gclk_gen_6__externalclock: 1000000
    enable_gclk_gen_7: false
    enable_gclk_gen_7__externalclock: 1000000
    gclk_arch_gen_0_RUNSTDBY: false
    gclk_arch_gen_0_enable: true
    gclk_arch_gen_0_idc: false
    ......@@ -224,6 +249,11 @@ drivers:
    functionality: System
    api: HAL:HPL:PM
    configuration:
    $input: 48000000
    $input_id: Generic clock generator 0
    RESERVED_InputFreq: 48000000
    RESERVED_InputFreq_id: Generic clock generator 0
    _$freq_output_CPU: 48000000
    apba_div: '1'
    apbb_div: '1'
    apbc_div: '1'
    ......@@ -578,6 +608,14 @@ drivers:
    functionality: System
    api: HAL:HPL:SYSCTRL
    configuration:
    $input: 32768
    $input_id: Generic clock generator 1
    RESERVED_InputFreq: 32768
    RESERVED_InputFreq_id: Generic clock generator 1
    _$freq_output_8MHz Internal Oscillator (OSC8M): 1000000
    _$freq_output_Digital Frequency Locked Loop (DFLL48M): 48000000
    _$freq_output_External Crystal Oscillator 0.4-32MHz (XOSC): 400000
    _$freq_output_Fractional Digital Phase Locked Loop (FDPLL96M): 47998976
    dfll48m_arch_bplckc: false
    dfll48m_arch_calibration: false
    dfll48m_arch_ccdis: true
    ......@@ -737,3 +775,4 @@ pads:
    user_label: PA25
    configuration: null
    toolchain_options: []
    static_files: []
    test_master/atmel_start_prj/config/hpl_sercom_config.h
    View file @ 8adb9ab3
    ......@@ -20,7 +20,7 @@
    // <i> I2C Bus clock (SCL) speed measured in Hz
    // <id> i2c_master_baud_rate
    #ifndef CONF_SERCOM_3_I2CM_BAUD
    #define CONF_SERCOM_3_I2CM_BAUD 400000
    #define CONF_SERCOM_3_I2CM_BAUD 100000
    #endif
    // </h>
    ......
    test_master/atmel_start_prj/hal/utils/src/utils_syscalls.c
    View file @ 8adb9ab3
    ......@@ -44,15 +44,15 @@ extern "C" {
    extern int errno;
    extern int _end;
    extern __attribute__((used)) caddr_t _sbrk(int incr);
    extern caddr_t _sbrk(int incr);
    extern int link(char *old, char *_new);
    extern int _close(int file);
    extern int _fstat(int file, struct stat *st);
    extern int _isatty(int file);
    extern int _lseek(int file, int ptr, int dir);
    extern void _exit(int status);
    extern __attribute__((used)) void _kill(int pid, int sig);
    extern __attribute__((used)) int _getpid(void);
    extern void _kill(int pid, int sig);
    extern int _getpid(void);
    /**
    * \brief Replacement of C library of _sbrk
    ......@@ -124,7 +124,7 @@ extern int _lseek(int file, int ptr, int dir)
    */
    extern void _exit(int status)
    {
    // printf("Exiting with status %d.\n", status);
    printf("Exiting with status %d.\n", status);
    for (;;)
    ;
    ......
    test_master/atmel_start_prj/hpl/dmac/hpl_dmac.c
    View file @ 8adb9ab3
    ......@@ -216,7 +216,6 @@ static inline void _dmac_handler(void)
    hri_dmac_write_CHID_reg(DMAC, channel);
    flag_status = hri_dmac_get_CHINTFLAG_reg(DMAC, DMAC_CHINTFLAG_MASK);
    hri_dmac_write_CHID_reg(DMAC, current_channel);
    if (flag_status & DMAC_CHINTFLAG_TERR) {
    hri_dmac_clear_CHINTFLAG_TERR_bit(DMAC);
    ......@@ -225,6 +224,7 @@ static inline void _dmac_handler(void)
    hri_dmac_clear_CHINTFLAG_TCMPL_bit(DMAC);
    tmp_resource->dma_cb.transfer_done(tmp_resource);
    }
    hri_dmac_write_CHID_reg(DMAC, current_channel);
    }
    /**
    ......
    test_master/atmel_start_prj/hpl/sercom/hpl_sercom.c
    View file @ 8adb9ab3
    ......@@ -1666,6 +1666,12 @@ static struct i2cs_configuration _i2css[] = {
    #if CONF_SERCOM_5_I2CS_ENABLE == 1
    I2CS_CONFIGURATION(5),
    #endif
    #if CONF_SERCOM_6_I2CS_ENABLE == 1
    I2CS_CONFIGURATION(6),
    #endif
    #if CONF_SERCOM_7_I2CS_ENABLE == 1
    I2CS_CONFIGURATION(7),
    #endif
    };
    #endif
    ......@@ -1707,6 +1713,10 @@ int32_t _i2c_s_async_init(struct _i2c_s_async_device *const device, void *const
    NVIC_ClearPendingIRQ((IRQn_Type)_sercom_get_irq_num(hw));
    NVIC_EnableIRQ((IRQn_Type)_sercom_get_irq_num(hw));
    // Enable Address Match and PREC interrupt by default.
    hri_sercomi2cs_set_INTEN_AMATCH_bit(hw);
    hri_sercomi2cs_set_INTEN_PREC_bit(hw);
    return ERR_NONE;
    }
    ......
    test_master/atmel_start_prj/samd21a/armcc/Device/SAMD21A/Source/ARM/startup_SAMD21.s 0 → 100644
    View file @ 8adb9ab3
    ;/*****************************************************************************
    ; * @file startup_SAMD21.s
    ; * @brief CMSIS Cortex-M0+ Core Device Startup File for
    ; * Atmel SAMD21 Device Series
    ; * @version V1.01
    ; * @date 25. March 2015
    ; *
    ; * @note
    ; * Copyright (C) 2014 - 2015 ARM Limited. All rights reserved.
    ; *
    ; * @par
    ; * ARM Limited (ARM) is supplying this software for use with Cortex-M
    ; * processor based microcontrollers. This file can be freely distributed
    ; * within development tools that are supporting such ARM based processors.
    ; *
    ; * @par
    ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
    ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
    ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
    ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
    ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
    ; *
    ; ******************************************************************************/
    ;/*
    ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
    ;*/
    ; <h> Stack Configuration
    ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
    ; </h>
    Stack_Size EQU 0x00000200
    AREA STACK, NOINIT, READWRITE, ALIGN=3
    Stack_Mem SPACE Stack_Size
    __initial_sp
    ; <h> Heap Configuration
    ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
    ; </h>
    Heap_Size EQU 0x00000000
    AREA HEAP, NOINIT, READWRITE, ALIGN=3
    __heap_base
    Heap_Mem SPACE Heap_Size
    __heap_limit
    PRESERVE8
    THUMB
    ; Vector Table Mapped to Address 0 at Reset
    AREA RESET, DATA, READONLY
    EXPORT __Vectors
    EXPORT __Vectors_End
    EXPORT __Vectors_Size
    __Vectors DCD __initial_sp ; Top of Stack
    DCD Reset_Handler ; Reset Handler
    DCD NMI_Handler ; NMI Handler
    DCD HardFault_Handler ; Hard Fault Handler
    DCD 0 ; Reserved
    DCD 0 ; Reserved
    DCD 0 ; Reserved
    DCD 0 ; Reserved
    DCD 0 ; Reserved
    DCD 0 ; Reserved
    DCD 0 ; Reserved
    DCD SVC_Handler ; SVCall Handler
    DCD 0 ; Reserved
    DCD 0 ; Reserved
    DCD PendSV_Handler ; PendSV Handler
    DCD SysTick_Handler ; SysTick Handler
    ; External Interrupts
    DCD PM_Handler ; 0 Power Manager
    DCD SYSCTRL_Handler ; 1 System Control
    DCD WDT_Handler ; 2 Watchdog Timer
    DCD RTC_Handler ; 3 Real-Time Counter
    DCD EIC_Handler ; 4 External Interrupt Controller
    DCD NVMCTRL_Handler ; 5 Non-Volatile Memory Controller
    DCD DMAC_Handler ; 6 Direct Memory Access Controller
    DCD USB_Handler ; 7 Universal Serial Bus
    DCD EVSYS_Handler ; 8 Event System Interface
    DCD SERCOM0_Handler ; 9 Serial Communication Interface 0
    DCD SERCOM1_Handler ; 10 Serial Communication Interface 1
    DCD SERCOM2_Handler ; 11 Serial Communication Interface 2
    DCD SERCOM3_Handler ; 12 Serial Communication Interface 3
    DCD SERCOM4_Handler ; 13 Serial Communication Interface 4
    DCD SERCOM5_Handler ; 14 Serial Communication Interface 5
    DCD TCC0_Handler ; 15 Timer Counter Control 0
    DCD TCC1_Handler ; 16 Timer Counter Control 1
    DCD TCC2_Handler ; 17 Timer Counter Control 2
    DCD TC3_Handler ; 18 Basic Timer Counter 0
    DCD TC4_Handler ; 19 Basic Timer Counter 1
    DCD TC5_Handler ; 20 Basic Timer Counter 2
    DCD TC6_Handler ; 21 Basic Timer Counter 3
    DCD TC7_Handler ; 22 Basic Timer Counter 4
    DCD ADC_Handler ; 23 Analog Digital Converter
    DCD AC_Handler ; 24 Analog Comparators
    DCD DAC_Handler ; 25 Digital Analog Converter
    DCD PTC_Handler ; 26 Peripheral Touch Controller
    DCD I2S_Handler ; 27 Inter-IC Sound Interface
    DCD AC1_Handler ; 28 Analog Comparators 1
    __Vectors_End
    __Vectors_Size EQU __Vectors_End - __Vectors
    AREA |.text|, CODE, READONLY
    ; Reset Handler
    Reset_Handler PROC
    EXPORT Reset_Handler [WEAK]
    IMPORT SystemInit
    IMPORT __main
    LDR R0, =SystemInit
    BLX R0
    LDR R0, =__main
    BX R0
    ENDP
    ; Dummy Exception Handlers (infinite loops which can be modified)
    NMI_Handler PROC
    EXPORT NMI_Handler [WEAK]
    B .
    ENDP
    HardFault_Handler\
    PROC
    EXPORT HardFault_Handler [WEAK]
    B .
    ENDP
    SVC_Handler PROC
    EXPORT SVC_Handler [WEAK]
    B .
    ENDP
    PendSV_Handler PROC
    EXPORT PendSV_Handler [WEAK]
    B .
    ENDP
    SysTick_Handler PROC
    EXPORT SysTick_Handler [WEAK]
    B .
    ENDP
    Default_Handler PROC
    EXPORT PM_Handler [WEAK]
    EXPORT PM_Handler [WEAK]
    EXPORT SYSCTRL_Handler [WEAK]
    EXPORT WDT_Handler [WEAK]
    EXPORT RTC_Handler [WEAK]
    EXPORT EIC_Handler [WEAK]
    EXPORT NVMCTRL_Handler [WEAK]
    EXPORT DMAC_Handler [WEAK]
    EXPORT USB_Handler [WEAK]
    EXPORT EVSYS_Handler [WEAK]
    EXPORT SERCOM0_Handler [WEAK]
    EXPORT SERCOM1_Handler [WEAK]
    EXPORT SERCOM2_Handler [WEAK]
    EXPORT SERCOM3_Handler [WEAK]
    EXPORT SERCOM4_Handler [WEAK]
    EXPORT SERCOM5_Handler [WEAK]
    EXPORT TCC0_Handler [WEAK]
    EXPORT TCC1_Handler [WEAK]
    EXPORT TCC2_Handler [WEAK]
    EXPORT TC3_Handler [WEAK]
    EXPORT TC4_Handler [WEAK]
    EXPORT TC5_Handler [WEAK]
    EXPORT TC6_Handler [WEAK]
    EXPORT TC7_Handler [WEAK]
    EXPORT ADC_Handler [WEAK]
    EXPORT AC_Handler [WEAK]
    EXPORT DAC_Handler [WEAK]
    EXPORT PTC_Handler [WEAK]
    EXPORT I2S_Handler [WEAK]
    EXPORT AC1_Handler [WEAK]
    PM_Handler
    SYSCTRL_Handler
    WDT_Handler
    RTC_Handler
    EIC_Handler
    NVMCTRL_Handler
    DMAC_Handler
    USB_Handler
    EVSYS_Handler
    SERCOM0_Handler
    SERCOM1_Handler
    SERCOM2_Handler
    SERCOM3_Handler
    SERCOM4_Handler
    SERCOM5_Handler
    TCC0_Handler
    TCC1_Handler
    TCC2_Handler
    TC3_Handler
    TC4_Handler
    TC5_Handler
    TC6_Handler
    TC7_Handler
    ADC_Handler
    AC_Handler
    DAC_Handler
    PTC_Handler
    I2S_Handler
    AC1_Handler
    B .
    ENDP
    ALIGN
    ; User Initial Stack & Heap
    IF :DEF:__MICROLIB
    EXPORT __initial_sp
    EXPORT __heap_base
    EXPORT __heap_limit
    ELSE
    IMPORT __use_two_region_memory
    EXPORT __user_initial_stackheap
    __user_initial_stackheap
    LDR R0, = Heap_Mem
    LDR R1, =(Stack_Mem + Stack_Size)
    LDR R2, = (Heap_Mem + Heap_Size)
    LDR R3, = Stack_Mem
    BX LR
    ALIGN
    ENDIF
    END
    test_master/atmel_start_prj/samd21a/armcc/Device/SAMD21A/Source/system_samd21.c 0 → 100644
    View file @ 8adb9ab3
    /**
    * \file
    *
    * \brief Low-level initialization functions called upon chip startup.
    *
    * Copyright (c) 2015 Atmel Corporation. All rights reserved.
    *
    * \asf_license_start
    *
    * \page License
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions are met:
    *
    * 1. Redistributions of source code must retain the above copyright notice,
    * this list of conditions and the following disclaimer.
    *
    * 2. Redistributions in binary form must reproduce the above copyright notice,
    * this list of conditions and the following disclaimer in the documentation
    * and/or other materials provided with the distribution.
    *
    * 3. The name of Atmel may not be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * 4. This software may only be redistributed and used in connection with an
    * Atmel microcontroller product.
    *
    * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
    * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
    * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
    * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
    * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
    * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    * POSSIBILITY OF SUCH DAMAGE.
    *
    * \asf_license_stop
    *
    */
    #include "samd21.h"
    /**
    * Initial system clock frequency. The System RC Oscillator (RCSYS) provides
    * the source for the main clock at chip startup.
    */
    #define __SYSTEM_CLOCK (1000000)
    uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/
    /**
    * Initialize the system
    *
    * @brief Setup the microcontroller system.
    * Initialize the System and update the SystemCoreClock variable.
    */
    void SystemInit(void)
    {
    // Keep the default device state after reset
    SystemCoreClock = __SYSTEM_CLOCK;
    return;
    }
    /**
    * Update SystemCoreClock variable
    *
    * @brief Updates the SystemCoreClock with current core Clock
    * retrieved from cpu registers.
    */
    void SystemCoreClockUpdate(void)
    {
    // Not implemented
    SystemCoreClock = __SYSTEM_CLOCK;
    return;
    }
    test_master/atmel_start_prj/samd21a/gcc/gcc/samd21g18a_flash.ld
    View file @ 8adb9ab3
    ......@@ -35,13 +35,12 @@ SEARCH_DIR(.)
    /* Memory Spaces Definitions */
    MEMORY
    {
    rom (rx) : ORIGIN = 0x00002000, LENGTH = 0x0001e000
    rom_mfw (rx) : ORIGIN = 0x00022000, LENGTH = 0x0001e000
    rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
    ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
    }
    /* The stack size used by the application. NOTE: you need to adjust according to your application. */
    STACK_SIZE = 0x2000;
    STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
    /* Section Definitions */
    SECTIONS
    ......
    test_master/atmel_start_prj/samd21a/gcc/gcc/startup_samd21.c
    View file @ 8adb9ab3
    ......@@ -105,7 +105,7 @@ void PTC_Handler(void) __attribute__((weak, alias("Dummy_Handler")));
    void I2S_Handler(void) __attribute__((weak, alias("Dummy_Handler")));
    /* Exception Table */
    __attribute__((section(".vectors"))) __attribute__((used)) const DeviceVectors exception_table = {
    __attribute__((section(".vectors"))) const DeviceVectors exception_table = {
    /* Configure Initial Stack Pointer, using linker-generated symbols */
    .pvStack = (void *)(&_estack),
    ......
    test_master/atmel_start_prj/samd21a/include/component-version.h
    View file @ 8adb9ab3
    /**
    * \file
    *
    * \brief Component version header file
    *
    * Copyright (c) 2018 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.
    *
    * \license_start
    *
    * \page License
    *
    * Licensed under the Apache License, Version 2.0 (the "License");
    * you may not use this file except in compliance with the License.
    * You may obtain a copy of the License at
    *
    * http://www.apache.org/licenses/LICENSE-2.0
    *
    * Unless required by applicable law or agreed to in writing, software
    * distributed under the License is distributed on an "AS IS" BASIS,
    * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    * See the License for the specific language governing permissions and
    * limitations under the License.
    *
    * \license_stop
    *
    */
    #ifndef _COMPONENT_VERSION_H_INCLUDED
    #define _COMPONENT_VERSION_H_INCLUDED
    #define COMPONENT_VERSION_MAJOR 1
    #define COMPONENT_VERSION_MINOR 3
    //
    // The COMPONENT_VERSION define is composed of the major and the minor version number.
    //
    // The last four digits of the COMPONENT_VERSION is the minor version with leading zeros.
    // The rest of the COMPONENT_VERSION is the major version.
    //
    #define COMPONENT_VERSION 10003
    //
    // The build number does not refer to the component, but to the build number
    // of the device pack that provides the component.
    //
    #define BUILD_NUMBER 331
    //
    // The COMPONENT_VERSION_STRING is a string (enclosed in ") that can be used for logging or embedding.
    //
    #define COMPONENT_VERSION_STRING "1.3"
    //
    // The COMPONENT_DATE_STRING contains a timestamp of when the pack was generated.
    //
    // The COMPONENT_DATE_STRING is written out using the following strftime pattern.
    //
    // "%Y-%m-%d %H:%M:%S"
    //
    //
    #define COMPONENT_DATE_STRING "2018-08-17 08:46:55"
    #endif/* #ifndef _COMPONENT_VERSION_H_INCLUDED */
    /**
    * \file
    *
    * \brief Component version header file
    *
    * Copyright (c) 2019 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.
    *
    * \license_start
    *
    * \page License
    *
    * Licensed under the Apache License, Version 2.0 (the "License");
    * you may not use this file except in compliance with the License.
    * You may obtain a copy of the License at
    *
    * http://www.apache.org/licenses/LICENSE-2.0
    *
    * Unless required by applicable law or agreed to in writing, software
    * distributed under the License is distributed on an "AS IS" BASIS,
    * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    * See the License for the specific language governing permissions and
    * limitations under the License.
    *
    * \license_stop
    *
    */
    #ifndef _COMPONENT_VERSION_H_INCLUDED
    #define _COMPONENT_VERSION_H_INCLUDED
    #define COMPONENT_VERSION_MAJOR 1
    #define COMPONENT_VERSION_MINOR 3
    //
    // The COMPONENT_VERSION define is composed of the major and the minor version number.
    //
    // The last four digits of the COMPONENT_VERSION is the minor version with leading zeros.
    // The rest of the COMPONENT_VERSION is the major version.
    //
    #define COMPONENT_VERSION 10003
    //
    // The build number does not refer to the component, but to the build number
    // of the device pack that provides the component.
    //
    #define BUILD_NUMBER 395
    //
    // The COMPONENT_VERSION_STRING is a string (enclosed in ") that can be used for logging or embedding.
    //
    #define COMPONENT_VERSION_STRING "1.3"
    //
    // The COMPONENT_DATE_STRING contains a timestamp of when the pack was generated.
    //
    // The COMPONENT_DATE_STRING is written out using the following strftime pattern.
    //
    // "%Y-%m-%d %H:%M:%S"
    //
    //
    #define COMPONENT_DATE_STRING "2019-09-19 13:04:38"
    #endif/* #ifndef _COMPONENT_VERSION_H_INCLUDED */
    test_master/atmel_start_prj/samd21a/include/instance/ac.h
    View file @ 8adb9ab3
    /**
    * \file
    *
    * \brief Instance description for AC
    *
    * Copyright (c) 2018 Microchip Technology Inc.
    *
    * \asf_license_start
    *
    * \page License
    *
    * SPDX-License-Identifier: Apache-2.0
    *
    * Licensed under the Apache License, Version 2.0 (the "License"); you may
    * not use this file except in compliance with the License.
    * You may obtain a copy of the Licence at
    *
    * http://www.apache.org/licenses/LICENSE-2.0
    *
    * Unless required by applicable law or agreed to in writing, software
    * distributed under the License is distributed on an AS IS BASIS, WITHOUT
    * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    * See the License for the specific language governing permissions and
    * limitations under the License.
    *
    * \asf_license_stop
    *
    */
    #ifndef _SAMD21_AC_INSTANCE_
    #define _SAMD21_AC_INSTANCE_
    /* ========== Register definition for AC peripheral ========== */
    #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
    #define REG_AC_CTRLA (0x42004400) /**< \brief (AC) Control A */
    #define REG_AC_CTRLB (0x42004401) /**< \brief (AC) Control B */
    #define REG_AC_EVCTRL (0x42004402) /**< \brief (AC) Event Control */
    #define REG_AC_INTENCLR (0x42004404) /**< \brief (AC) Interrupt Enable Clear */
    #define REG_AC_INTENSET (0x42004405) /**< \brief (AC) Interrupt Enable Set */
    #define REG_AC_INTFLAG (0x42004406) /**< \brief (AC) Interrupt Flag Status and Clear */
    #define REG_AC_STATUSA (0x42004408) /**< \brief (AC) Status A */
    #define REG_AC_STATUSB (0x42004409) /**< \brief (AC) Status B */
    #define REG_AC_STATUSC (0x4200440A) /**< \brief (AC) Status C */
    #define REG_AC_WINCTRL (0x4200440C) /**< \brief (AC) Window Control */
    #define REG_AC_COMPCTRL0 (0x42004410) /**< \brief (AC) Comparator Control 0 */
    #define REG_AC_COMPCTRL1 (0x42004414) /**< \brief (AC) Comparator Control 1 */
    #define REG_AC_SCALER0 (0x42004420) /**< \brief (AC) Scaler 0 */
    #define REG_AC_SCALER1 (0x42004421) /**< \brief (AC) Scaler 1 */
    #else
    #define REG_AC_CTRLA (*(RwReg8 *)0x42004400UL) /**< \brief (AC) Control A */
    #define REG_AC_CTRLB (*(WoReg8 *)0x42004401UL) /**< \brief (AC) Control B */
    #define REG_AC_EVCTRL (*(RwReg16*)0x42004402UL) /**< \brief (AC) Event Control */
    #define REG_AC_INTENCLR (*(RwReg8 *)0x42004404UL) /**< \brief (AC) Interrupt Enable Clear */
    #define REG_AC_INTENSET (*(RwReg8 *)0x42004405UL) /**< \brief (AC) Interrupt Enable Set */
    #define REG_AC_INTFLAG (*(RwReg8 *)0x42004406UL) /**< \brief (AC) Interrupt Flag Status and Clear */
    #define REG_AC_STATUSA (*(RoReg8 *)0x42004408UL) /**< \brief (AC) Status A */
    #define REG_AC_STATUSB (*(RoReg8 *)0x42004409UL) /**< \brief (AC) Status B */
    #define REG_AC_STATUSC (*(RoReg8 *)0x4200440AUL) /**< \brief (AC) Status C */
    #define REG_AC_WINCTRL (*(RwReg8 *)0x4200440CUL) /**< \brief (AC) Window Control */
    #define REG_AC_COMPCTRL0 (*(RwReg *)0x42004410UL) /**< \brief (AC) Comparator Control 0 */
    #define REG_AC_COMPCTRL1 (*(RwReg *)0x42004414UL) /**< \brief (AC) Comparator Control 1 */
    #define REG_AC_SCALER0 (*(RwReg8 *)0x42004420UL) /**< \brief (AC) Scaler 0 */
    #define REG_AC_SCALER1 (*(RwReg8 *)0x42004421UL) /**< \brief (AC) Scaler 1 */
    #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
    /* ========== Instance parameters for AC peripheral ========== */
    #define AC_CMP_NUM 2 // Number of comparators
    #define AC_GCLK_ID_ANA 32 // Index of Generic Clock for analog
    #define AC_GCLK_ID_DIG 31 // Index of Generic Clock for digital
    #define AC_NUM_CMP 2
    #define AC_PAIRS 1 // Number of pairs of comparators
    #endif /* _SAMD21_AC_INSTANCE_ */
    /**
    * \file
    *
    * \brief Instance description for AC
    *
    * Copyright (c) 2018 Microchip Technology Inc.
    *
    * \asf_license_start
    *
    * \page License
    *
    * SPDX-License-Identifier: Apache-2.0
    *
    * Licensed under the Apache License, Version 2.0 (the "License"); you may
    * not use this file except in compliance with the License.
    * You may obtain a copy of the Licence at
    *
    * http://www.apache.org/licenses/LICENSE-2.0
    *
    * Unless required by applicable law or agreed to in writing, software
    * distributed under the License is distributed on an AS IS BASIS, WITHOUT
    * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    * See the License for the specific language governing permissions and
    * limitations under the License.
    *
    * \asf_license_stop
    *
    */
    #ifndef _SAMD21_AC_INSTANCE_
    #define _SAMD21_AC_INSTANCE_
    /* ========== Register definition for AC peripheral ========== */
    #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
    #define REG_AC_CTRLA (0x42004400) /**< \brief (AC) Control A */
    #define REG_AC_CTRLB (0x42004401) /**< \brief (AC) Control B */
    #define REG_AC_EVCTRL (0x42004402) /**< \brief (AC) Event Control */
    #define REG_AC_INTENCLR (0x42004404) /**< \brief (AC) Interrupt Enable Clear */
    #define REG_AC_INTENSET (0x42004405) /**< \brief (AC) Interrupt Enable Set */
    #define REG_AC_INTFLAG (0x42004406) /**< \brief (AC) Interrupt Flag Status and Clear */
    #define REG_AC_STATUSA (0x42004408) /**< \brief (AC) Status A */
    #define REG_AC_STATUSB (0x42004409) /**< \brief (AC) Status B */
    #define REG_AC_STATUSC (0x4200440A) /**< \brief (AC) Status C */
    #define REG_AC_WINCTRL (0x4200440C) /**< \brief (AC) Window Control */
    #define REG_AC_COMPCTRL0 (0x42004410) /**< \brief (AC) Comparator Control 0 */
    #define REG_AC_COMPCTRL1 (0x42004414) /**< \brief (AC) Comparator Control 1 */
    #define REG_AC_SCALER0 (0x42004420) /**< \brief (AC) Scaler 0 */
    #define REG_AC_SCALER1 (0x42004421) /**< \brief (AC) Scaler 1 */
    #else
    #define REG_AC_CTRLA (*(RwReg8 *)0x42004400UL) /**< \brief (AC) Control A */
    #define REG_AC_CTRLB (*(WoReg8 *)0x42004401UL) /**< \brief (AC) Control B */
    #define REG_AC_EVCTRL (*(RwReg16*)0x42004402UL) /**< \brief (AC) Event Control */
    #define REG_AC_INTENCLR (*(RwReg8 *)0x42004404UL) /**< \brief (AC) Interrupt Enable Clear */
    #define REG_AC_INTENSET (*(RwReg8 *)0x42004405UL) /**< \brief (AC) Interrupt Enable Set */
    #define REG_AC_INTFLAG (*(RwReg8 *)0x42004406UL) /**< \brief (AC) Interrupt Flag Status and Clear */
    #define REG_AC_STATUSA (*(RoReg8 *)0x42004408UL) /**< \brief (AC) Status A */
    #define REG_AC_STATUSB (*(RoReg8 *)0x42004409UL) /**< \brief (AC) Status B */
    #define REG_AC_STATUSC (*(RoReg8 *)0x4200440AUL) /**< \brief (AC) Status C */
    #define REG_AC_WINCTRL (*(RwReg8 *)0x4200440CUL) /**< \brief (AC) Window Control */
    #define REG_AC_COMPCTRL0 (*(RwReg *)0x42004410UL) /**< \brief (AC) Comparator Control 0 */
    #define REG_AC_COMPCTRL1 (*(RwReg *)0x42004414UL) /**< \brief (AC) Comparator Control 1 */
    #define REG_AC_SCALER0 (*(RwReg8 *)0x42004420UL) /**< \brief (AC) Scaler 0 */
    #define REG_AC_SCALER1 (*(RwReg8 *)0x42004421UL) /**< \brief (AC) Scaler 1 */
    #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
    /* ========== Instance parameters for AC peripheral ========== */
    #define AC_CMP_NUM 2 // Number of comparators
    #define AC_GCLK_ID_ANA 32 // Index of Generic Clock for analog
    #define AC_GCLK_ID_DIG 31 // Index of Generic Clock for digital
    #define AC_NUM_CMP 2
    #define AC_PAIRS 1 // Number of pairs of comparators
    #endif /* _SAMD21_AC_INSTANCE_ */
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