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DIOT CompactPCI Serial crate hardware
DIOT CompactPCI Serial crate hardware
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Last edited by Grzegorz Daniluk Jan 13, 2021
Page history

DI/OT 3U crate project

Project description

The 3U crate is a main component of the Distributed I/O Tier hardware kit. The enclosure is assembled using 3U sub-rack components compatible with the IEC 60297-3 and IEEE 1101.10-1996 mechanical standards. These are low-cost aluminum elements available in the products portfolio of all major crate vendors. The crate provides:

  • in-house designed 9 slot backplane compatible with CompactPCI Serial standard
  • support to host Rear Transition Modules (RTMs) - the RTMs are usually fully passive boards that provide an interface with external equipment through a direct RTM connector to the corresponding Peripheral Board
  • two power supply slots (two power backplanes) to host dual modular redundancy power supplies in load-sharing configuration
  • optional 1U fan tray that can be mounted either below or above the main 3U crate

DI/OT crate 19" rack variant:

nVent_DIOT

DI/OT crate tunnel variant:

DIOT_crate_full_3d

DI/OT main backplane

The DI/OT main backplane is a KiCad design compatible with the CompactPCI Serial standard. It provides 9 slots (1 System Slot and 8 Peripheral Slots) and the support for RTMs.

DI/OT main backplane(front view):

backplane_front

DI/OT main backplane topology:

backplane_topology_scaled

The backplane provides:

  • a star topology of 144 LVDS lanes in total (18 LVDS lanes per Peripheral Slot) used as differential or single-ended I/Os to implement communication between the System and Peripheral Boards. Out of those, 1 LVDS lane per Peripheral Slot is reserved for the distribution of low-jitter clock and 2 LVDS lanes are designated for high-speed communication
  • the Reset line driven by the System Slot to reset all the Peripheral Boards
  • a set of 5 multidrop lines (multidrop IRQs) can be used as interrupt lines of 5 priorities, or for any other one-to-many signaling.
  • a star of single-ended presence detection signals and a service I2C bus (shared among all the slots)
  • distribution of two auxiliary voltages to all Peripheral Slots.

Release

Date Release
04.05.2020 v1.1

Status

Date Event
May 2019 CPCIserial backplane and Power backplane PCB design kick-off; backplanes development notes
Nov 2019 Mechanical crate design kick-off; crate development notes
Jan 2020 Discussion with nVent/Schroff; Schroff meeting notes
Marc 2020 Crate mechanics release v1.0
Apr 2020 Crate mechanics review of v1.0 with 15 engineers
May 2020 Crate mechanics release v1.1
3 Dec 2020 First 2 prototypes delivered by nVent

Contacts

  • Greg Daniluk - CERN
Clone repository
  • Diot backplanes dev notes
  • Release v1.1
  • Schroff meeting notes
  • Home
  • Release v1.0
  • DI
    • Diot crate dev notes
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