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Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports Cute-WR-DP
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cute-wr-dp
schematics
6-FPGA_GTP.SchDoc
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Add some capacitances and change the location of capacitiances used in P3v3Clean
· 3749af9f
hongming
authored
Apr 06, 2016
3749af9f