schematics/7-FPGA_Config.SchDoc · 22408cdce4e874368ed2e2bad7798903cad4723e · Projects / Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports Cute-WR-DP · GitLab

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Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports Cute-WR-DP
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cute-wr-dp
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7-FPGA_Config.SchDoc

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Update the FMC signals to follow the VITA standard. · 22408cdc
hongming authored Feb 14, 2017

22408cdc