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# Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports
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## 1.Introduction
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## Introduction
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The Cute-WR-DP is the enhanced version of
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[Cute-WR](https://www.ohwr.org/project/cute-wr/wiki) with dual WR
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ports,The two ports can act in different modes:
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1\) parallel mode (Cute-WR-DP-PM)
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### Parallel mode (Cute-WR-DP-PM)
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In PM mode both port acts as down-link port connect to different WRS,
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provide redundancy to improve the relibility for safety related
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applications. Two WRPC work simultaneously on each port, the switch over
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efforts developed on WRS can be adapted.
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2\) chain mode(Cute-WR-DP-CM)
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efforts developed on WRS can be adapted.
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### Chain mode(Cute-WR-DP-CM)
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In CM mode, two ports act as one down-link and one up-link to support
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cascade topology. With deeper modification to WR technology
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(show-stopper I am not aware may exist), more attractive features can be
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| ... | ... | @@ -19,17 +22,15 @@ explored like ring topology, on-the-fly data transmission, reflective |
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memory (GE property though). The possibilities can be remarkable.
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The CUTEWR-DP board can also be used as normal WR node when only one
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port is used. Currently, the CUTEWR-DPV2 is published. Check the
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[Github](https://github.com/leehongming/cutewr_dp_v2) to get more
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information.
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port is used.
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## 2.Hardware
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## Hardware
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###
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512871215337553496.jpg
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The Cute-WR-DP
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*Top view of Cute-WR-DP**
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### 2.1 Features:
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*Isometric view of Cute-WR-DP**
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h3. Features:
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- 3.3v power supply, 1.5A
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- VITA57 FMC mezzanine;
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| ... | ... | @@ -51,62 +52,24 @@ The Cute-WR-DP |
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- Addition Low-cost connector on FMC Region3
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## 3\. Firmware
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### 3.1 Structure Design
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### 3.2 Design Files
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## 4\. Demo":https://www.ohwr.org//Cute-WR-DP demo"
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The Demo contains one WR switch and three CUTEWR-DPV2 boards. The WR
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switch acts as the Grandmaster(Layer 1) in this small network, and three
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CUTEWR-DPV2 boards are connected one by one. They are in Layer 2/3/4 of
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this network seperately.
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In each board, use the blue SFP (AXGE-1254-0531) in SFP0 and red SFP
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(AXGE-3454-0531) in SFP1. (The label of each SFP is on the PCB)
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Use the command below to change the parameters of each port.
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- The SFP\_PN is AXGE-1254-0531 or AXGE-3454-0531 if you use the SFPs
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produced by AXCEN.
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- The port is 0 or 1.
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- The units of dtx\_value and drx\_value are picosecond.
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- alpha value is depended on your fiber.
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<!-- end list -->
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## Firmware
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sfp erase
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sfp add SFP_PN port dtx_value drx_value alpha_value
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The firmware is based on WRPC with modified code in the LM32 softcore.
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The additional resource cost to support Dual Port is not twice of the
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single port.
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Use the command below to set the IP of each port.
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## Project information
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- command "ip set ip\_addr" will set the ip address of port 0. The ip
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address of port 1 will be ip address of port 0 adds 1.
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[Hardware design
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files](https://github.com/leehongming/cutewr_dp_hw.git)
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[Firmware demo
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project](https://github.com/leehongming/cutewr_dp_v2.git)
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Follow the
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[instructions](https://www.ohwr.org/project/cute-wr-dp/wikis/cute-wr-dp-demo)
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to run the project.
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<!-- end list -->
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ip set ip_addr_port0
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Use the command below to start or stop the PTP of each port.
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ptp start (start both two ports)
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ptp start 0/1 (start the selected port)
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ptp stop (stop both two ports)
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ptp stop 0/1 (stop the selected port)
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Use the command "gui" to get the PTP status of each port.
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The results are shown as
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below:
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The demo synchronization results are shown as below, C1(yellow) is the
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WR switch while C2/C3/C4 are CUTEWR-DP
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boards:
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## 5\. Current status
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## Current status
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<table>
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<tbody>
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<td>04-Apr-2017</td>
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<td>Publish the CUTEWR-DPV2</td>
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</tr>
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<tr class="even">
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<td>10-Mar-2018</td>
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<td>20 Cute-WR-DP produced</td>
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</tr>
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</tbody>
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</table>
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## 6\. Design files
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### Hardware design files
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git clone https://github.com/leehongming/cutewr_dp_hw.git
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## Contacts
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git clone --recursive https://github.com/leehongming/cutewr_dp_v2.git
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### Commercial producers
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The branch master contains the project which supports the one port
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synchronization (normal CUTEWR).
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The branch master\_dp contains the project which supports the dual port
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synchronization (chain mode).
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\*[Commercially available](http://www.synctechnology.cn)
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Follow the instructions to run the project.
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### General question about project
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### Firmware demo project
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- [Guanghua Gong](https://www.ohwr.org/users/925) - Tsinghua
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University, Beijing
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## 7\. Users list
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## Users list
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- [China Accelerator Driven Sub-critical
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System](http://english.ihep.cas.cn/rs/fs/ADS/)
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