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# Cute-WR-DP (Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports)
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Spartan-6 FPGA is used on Cute-WR-DP which is quite old; the [Cute-WR-A7](https://ohwr.org/project/cute-wr-a7/wikis/home) replaces the FPGA with much newer Artix 7 family.
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## Introduction
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The Cute-WR-DP is the enhanced version of
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[Cute-WR](https://www.ohwr.org/project/cute-wr/wiki) with dual WR ports.
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Spartan-6 FPGA is used on Cute-WR-DP which is quite old; the [Cute-WR-A7](https://ohwr.org/project/cute-wr-a7/wikis/home) replaces the FPGA with much newer Artix 7 family.
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There are three operation modes for Cute-WR-DP.
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