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# Compact Universal Timing Endpoint Based on White Rabbit
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# Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports
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## Introduction
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The cute-wr project is a standalone White Rabbit Node implementation on
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a FPGA Mezzanine Card. The idea is to have a compact, low-cost and
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common WR NIC for synchronous DAQ frontends and other applications.
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The Cute-WR-DP is the enhanced version of
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[Cute-WR](https://www.ohwr.org/project/cute-wr/wiki) with dual WR ports,
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they can work in parallel to provide redundancy for high reliable
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application or work in chain to support cascade topology.
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*INFORMATION BELOW IS ONLY A TEMPLATE. PLEASE MODIFY**
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## Structure Design
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