... | ... | @@ -18,8 +18,8 @@ I/O, connected directly to the FPGA to be flexible (input / output, LVDS |
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/ CMOS, SERDES
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etc.).
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[![](/project/white-rabbit/uploads/11578355de03b7cc74a366b23b508c48/svectop_s.png)](/project/white-rabbit/uploads/0eeb5b430351eca8a4e76a5af3892c2c/svectop_l.png)
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*SVEC V1 production board**
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![](/project/fmc-adc-250m12b2cha/uploads/d9eb59c1f7237e87d3de1f354a99a34b/FmcAdc250M12b2cha_1_00_Board3D.jpg)
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*CRIO-WR V1.0 production board**
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## Main Features
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