sw: Added test scripts for SFP tests.

As mentioned in the previous commit, the SFP EEPROM test is not yet working. Still under investigation as to why.

sw: Added test scripts for SFP tests.
As mentioned in the previous commit, the SFP EEPROM test is not yet working. Still under investigation as to why.
c514a21a · Theodor-Adrian Stana · e35f6bbc · c514a21a · c514a21a · c514a21a
Commit c514a21a authored Nov 03, 2014 by Theodor-Adrian Stana
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Showing with 426 additions and 9 deletions

Makefile pts/Makefile +13 -9

sfp_eeprom.py pts/python/sfp_eeprom.py +226 -0

sfp_test.py pts/python/sfp_test.py +187 -0

No files found.
--- a/pts/Makefile
+++ b/pts/Makefile
@@ -8,7 +8,7 @@ all:
 	mkdir -p pts-conv-ttl-rs485/lib
 	cp -r shell/ pts-conv-ttl-rs485/
 	mv pts-conv-ttl-rs485/shell/program pts-conv-ttl-rs485/boot
-	wget -P pts-conv-ttl-rs485/boot http://www.ohwr.org/attachments/download/3644/pts.bit
+	wget -P pts-conv-ttl-rs485/boot http://www.ohwr.org/attachments/download/3647/pts.bit
 	cp python/pts.py pts-conv-ttl-rs485
 	cp python/jpts.py pts-conv-ttl-rs485
 	cp python/vv_pts.py pts-conv-ttl-rs485/lib/
@@ -19,15 +19,19 @@ all:
 	sed -i "s/ELMAPWD = \"\"/ELMAPWD = \"$(ELMAPWD)\"/" pts-conv-ttl-rs485/lib/ptsdefine.py
 	sed -i "s/ELMASLOT = 4/ELMASLOT = $(ELMASLOT)/" pts-conv-ttl-rs485/lib/ptsdefine.py

-	cp python/leds.py pts-conv-ttl-rs485/tests/
-	cp python/dac_vcxo_pll.py pts-conv-ttl-rs485/tests/
-	cp python/therm_id.py pts-conv-ttl-rs485/tests/
-	cp python/ttl_pulse_switch.py pts-conv-ttl-rs485/tests/
+	cp python/leds.py 					pts-conv-ttl-rs485/tests/
+	cp python/dac_vcxo_pll.py 			pts-conv-ttl-rs485/tests/
+	cp python/therm_id.py 				pts-conv-ttl-rs485/tests/
+	cp python/ttl_pulse_switch.py 		pts-conv-ttl-rs485/tests/
+	cp python/sfp_eeprom.py 			pts-conv-ttl-rs485/tests/
+	cp python/sfp_test.py 				pts-conv-ttl-rs485/tests/

-	ln -s tests/dac_vcxo_pll.py pts-conv-ttl-rs485/test01.py
-	ln -s tests/therm_id.py pts-conv-ttl-rs485/test02.py
-	ln -s tests/ttl_pulse_switch.py pts-conv-ttl-rs485/test03.py
-	ln -s tests/leds.py pts-conv-ttl-rs485/test04.py
+	ln -s tests/dac_vcxo_pll.py 		pts-conv-ttl-rs485/test01.py
+	ln -s tests/therm_id.py 			pts-conv-ttl-rs485/test02.py
+	ln -s tests/ttl_pulse_switch.py 	pts-conv-ttl-rs485/test03.py
+	ln -s tests/sfp_eeprom.py			pts-conv-ttl-rs485/test04.py
+	ln -s tests/sfp_test.py				pts-conv-ttl-rs485/test05.py
+	ln -s tests/leds.py 				pts-conv-ttl-rs485/test06.py

 clean:
 	rm -rf pts-conv-ttl-rs485

--- a/pts/python/sfp_eeprom.py
+++ b/pts/python/sfp_eeprom.py
+##________________________________________________________________________________________________
+##
+##                                      CONV-TTL-RS485 PTS
+##
+##                                         CERN,BE/CO-HT
+##________________________________________________________________________________________________
+##
+##------------------------------------------------------------------------------------------------
+##
+##                                 CONV-TTL-RS485 SFP EEPROM test
+##
+##------------------------------------------------------------------------------------------------
+##
+## Description  Testing of the SFP EEPROM chip on the CONV-TTL-RS485 board (SFP J1). The firmware
+##              loaded to the on-board FPGA implements the interface for the communication
+##              between the I2C bus on the P1 VME connector and the I2C of the SFP EEPROM; the
+##              interface is an I2C Wishbone master, running on a 20 MHz system clock.
+##
+##              The I2C Wishbone master can be accessed at base address 0x140.
+##              The I2C address of the SFP EEPROM is 0x50, predefined in the part number.
+##
+##              The test checks the presence of the SFP connector, reads the connector type and
+##              verifies the received value.
+##
+## FW to load   pts.bit
+## Authors      Julian Lewis (Julian.Lewis@cern.ch)
+## Website      http://www.ohwr.org/projects/pts
+## Date         15/04/2013
+##------------------------------------------------------------------------------------------------
+##
+##------------------------------------------------------------------------------------------------
+##                               GNU LESSER GENERAL PUBLIC LICENSE
+##                              ------------------------------------
+## This source file is free software; you can redistribute it and/or modify it under the terms of
+## the GNU Lesser General Public License as published by the Free Software Foundation; either
+## version 2.1 of the License, or (at your option) any later version.
+## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
+## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+## See the GNU Lesser General Public License for more details.
+## You should have received a copy of the GNU Lesser General Public License along with this
+## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
+##-------------------------------------------------------------------------------------------------
+
+##-------------------------------------------------------------------------------------------------
+##                                            Import
+##-------------------------------------------------------------------------------------------------
+
+# Import system modules
+
+import sys
+sys.path.append("../lib/")
+import time
+import os
+
+# Import common modules
+
+from ctypes import *
+from ptsexcept import *
+from vv_pts import *
+
+from ptsdefine import *
+
+##-------------------------------------------------------------------------------------------------
+##                                           I2C class                                           --
+##-------------------------------------------------------------------------------------------------
+
+class COpenCoresI2C:
+
+    R_PREL = 0x0
+    R_PREH = 0x4
+    R_CTR  = 0x8
+    R_TXR  = 0xC
+    R_RXR  = 0xC
+    R_CR   = 0x10
+    R_SR   = 0x10
+
+    CTR_EN   = (1<<7)
+    CR_STA   = (1<<7)
+    CR_STO   = (1<<6)
+    CR_WR    = (1<<4)
+    CR_RD    = (1<<5)
+    CR_NACK  = (1<<3)
+    SR_RXACK = (1<<7)
+    SR_TIP   = (1<<1)
+
+    def scan_bus(self):
+        for i in range(0,128):
+            self.wr_reg(self.R_TXR, i<<1);
+            self.wr_reg(self.R_CR, self.CR_STA | self.CR_WR);
+            self.wait_busy()
+            self.wr_reg(self.R_CR, self.CR_STO);
+            self.wait_busy()
+
+
+    def wr_reg(self, addr, val):
+        self.bus.vv_write(self.base + addr,val)
+
+    def rd_reg(self,addr):
+        return self.bus.vv_read(self.base + addr)
+
+    def __init__(self, bus, base, prescaler):
+        self.bus = bus;
+        self.base = base;
+        self.wr_reg(self.R_CTR, 0);
+        self.wr_reg(self.R_PREL, (prescaler & 0xff))
+        self.wr_reg(self.R_PREH, (prescaler >> 8))
+        self.wr_reg(self.R_CTR, self.CTR_EN);
+        self.scan_bus()
+
+    def wait_busy(self):
+        tmo = 100
+        while(self.rd_reg(self.R_SR) & self.SR_TIP):
+            tmo = tmo -1
+            if tmo <= 0:
+                msg = "ERROR: SFP_EEPROM: Not responding"
+                raise PtsError(msg)
+
+    def start(self, addr, write_mode):
+        addr = addr << 1
+        if(write_mode == False):
+            addr = addr | 1;
+        self.wr_reg(self.R_TXR, addr);
+        self.wr_reg(self.R_CR, self.CR_STA | self.CR_WR);
+        self.wait_busy()
+
+        if(self.rd_reg(self.R_SR) & self.SR_RXACK):
+            pass
+
+    def write(self, data, last):
+        self.wr_reg(self.R_TXR, data);
+        cmd = self.CR_WR;
+        if(last):
+            cmd = cmd | self.CR_STO;
+        self.wr_reg(self.R_CR, cmd);
+        self.wait_busy();
+        if(self.rd_reg(self.R_SR) & self.SR_RXACK):
+            pass
+
+    def read(self, last):
+        cmd = self.CR_RD;
+        if(last):
+            cmd = cmd | self.CR_STO | self.CR_NACK;
+        self.wr_reg(self.R_CR, cmd);
+        self.wait_busy();
+
+        return self.rd_reg(self.R_RXR);
+
+
+##-------------------------------------------------------------------------------------------------
+##                                        EEPROM SFP class                                       --
+##-------------------------------------------------------------------------------------------------
+
+class EEPROM_SFP:
+
+    def __init__(self, i2c, addr):
+        self.i2c = i2c;
+        self.addr = addr;
+
+    def wr_reg16(self, addr, value):
+        self.i2c.start(self.addr, True);
+        self.i2c.write(addr, False);
+        tmp = (value >> 8) & 0xFF;
+        self.i2c.write(value, False);
+        tmp = value & 0xFF;
+        self.i2c.write(value, True)
+
+    def wr_reg8(self, addr, value):
+        self.i2c.start(self.addr, True);
+        self.i2c.write(addr, False);
+        self.i2c.write(value, True);
+
+    def rd_reg16(self, addr):
+        self.i2c.start(self.addr, True);
+        self.i2c.write(addr, False);
+        self.i2c.start(self.addr, False);
+        tmp_MSB = self.i2c.read(False);
+        tmp_LSB = self.i2c.read(True);
+        value = (tmp_MSB << 8) | tmp_LSB;
+        return value;
+
+    def rd_reg8(self, addr):
+        self.i2c.start(self.addr, True);
+        self.i2c.write(addr, False);
+        self.i2c.start(self.addr, False);
+        return self.i2c.read(True);
+
+
+##-------------------------------------------------------------------------------------------------
+##                                             main                                              --
+##-------------------------------------------------------------------------------------------------
+
+def main(bus,tname,inf,log):
+
+    """
+    tests : SFP J1 EEPROM
+    uses  : pts.bit and sfp_eeprom.py
+    """
+
+    SFP_EEPROM_I2C_ADDR = 0x50
+
+    pel = PTS_ERROR_LOGGER(inf,log)
+
+    try:
+        # Create bus and EEPROM objects
+        i2c = COpenCoresI2C(bus, SFP_EEPROM_BASE, 39);
+        eeprom = EEPROM_SFP(i2c, SFP_EEPROM_I2C_ADDR);
+
+        type = eeprom.rd_reg8(0x0);
+
+        inf.write("SFP type: " + hex(type) + "\n")
+        if (type == 3) :
+            inf.write("SFP type is correct\n")
+        else:
+            msg = "ERROR: SFP-EEPROM: Wrong connector type. It should be 0x3."
+            pel.set(msg)
+
+        return pel.get()
+
+    except BusException, e:
+        raise PtsError("SKT Exception: %s" % (e))
+
+    except BusWarning, e:
+        raise PtsError("SKT Warning: %s" % (e))
+
+    #finally:
+    #    return pel.get()
--- a/pts/python/sfp_test.py
+++ b/pts/python/sfp_test.py
+##________________________________________________________________________________________________
+##
+##                                        CONV-TTL-BLO PTS
+##
+##                                         CERN,BE/CO-HT
+##________________________________________________________________________________________________
+##
+##------------------------------------------------------------------------------------------------
+##
+##                                     CONV-TTL-BLO SFP test
+##
+##------------------------------------------------------------------------------------------------
+##
+## Description  This Python module performs the testing of the MGT module on the CONV-TTL-BLO FPGA
+##              (IC14) and the connections to the small form-factor pluggable (SFP) module.
+##              For this test the SFP Loopback Adapter Module meeds to be plugged in the SFP
+##              connector. The idea of the test is to loopback the transmitter and the receiver
+##              of the link and check if the link is established. Loopback takes place through the
+##              SFP loopback adapter.
+##
+##              Firmware inside the FPGA implements an endpoint module together with a miniNIC
+##              module to implement the communication. There are also 16kB of packet RAM available
+##              to the two modules. The test program views these three components as one, with the
+##              base address of the unified component as the endpoint's base address.
+##
+##              Thejendpoint module is located at address 0x200 (offset 0x000),
+##              The miniNIC module is located  at address 0x400 (offset 0x200),
+##              The 16 kB RAM is located       at address 0x800 (offset 0x600)
+##
+## FW to load   conv_ttl_blo_v2.bit
+## Authors      Julian Lewis (Julian.Lewis@cern.ch)
+##              Theodor-Adrian Stana (t.stana@cern.ch)
+## Website      http://www.ohwr.org/projects/pts
+## Date         17/04/2013
+##-------------------------------------------------------------------------------------------------
+##
+##------------------------------------------------------------------------------------------------
+##                               GNU LESSER GENERAL PUBLIC LICENSE
+##                              ------------------------------------
+## This source file is free software; you can redistribute it and/or modify it under the terms of
+## the GNU Lesser General Public License as published by the Free Software Foundation; either
+## version 2.1 of the License, or (at your option) any later version.
+## This source is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
+## without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+## See the GNU Lesser General Public License for more details.
+## You should have received a copy of the GNU Lesser General Public License along with this
+## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
+##------------------------------------------------------------------------------------------------
+
+##------------------------------------------------------------------------------------------------
+##                                            Import
+##------------------------------------------------------------------------------------------------
+
+# Import system modules
+
+import ctypes
+import sys
+sys.path.append("../lib/")
+import time
+import os
+import traceback
+
+# Import common modules
+
+from ctypes import *
+from ptsexcept import *
+from vv_pts import *
+
+from ptsdefine import *
+
+##-------------------------------------------------------------------------------------------------
+##                                          Minic class                                          --
+##-------------------------------------------------------------------------------------------------
+
+class CMinic:
+
+    EP_REG_ECR       = 0x0
+    EP_REG_MACL      = 0x28
+    EP_REG_MDIO_CR   = 0x2c
+    EP_REG_MDIO_SR   = 0x30
+    EP_REG_IDR       = 0x34
+    EP_MDIO_SR_READY = 0x80000000
+    EP_ECR_TX_EN     = 0x40
+    EP_ECR_RX_EN     = 0x80
+    MDIO_MCR         = 0
+    MDIO_MSR         = 1
+    MDIO_MCR_PDOWN   = (1<<11)
+    MDIO_MCR_RESET   = (1<<15)
+    MDIO_MSR_LSTATUS = (1<<2)
+
+    def __init__(self, bus, base):
+        self.base = base;
+        self.bus = bus;
+        self.init_ep();
+
+    def wr_reg(self, addr, val):
+        self.bus.vv_write(self.base + addr,val)
+
+    def rd_reg(self,addr):
+        return self.bus.vv_read(self.base + addr)
+
+    def ep_readl(self, addr):
+        return self.rd_reg(SFP_ENDPOINT_OFS + addr)
+
+    def ep_writel(self, addr, val):
+        self.wr_reg(SFP_ENDPOINT_OFS + addr, val) # used to be self.PTS_SFP_ENDPO...
+
+    def pcs_readl(self, addr):
+        val = 0
+        self.ep_writel(self.EP_REG_MDIO_CR, addr << 16);
+
+        tmo = 10000
+        while (val & self.EP_MDIO_SR_READY) == 0:
+            val = self.ep_readl(self.EP_REG_MDIO_SR)
+            tmo = tmo -1
+            if tmo <= 0:
+                msg = "ERROR: MINIC: Not responding"
+                raise PtsError(msg)
+
+        return (val & 0xffff)
+
+    def pcs_writel(self, addr, val):
+        val = 0
+        self.ep_writel(self.EP_REG_MDIO_CR, (addr << 16) | (1 << 31) | val);
+
+        tmo = 10000
+        while (val & self.EP_MDIO_SR_READY) == 0:
+            val = self.ep_readl(self.EP_REG_MDIO_SR)
+            tmo = tmo -1
+            if tmo <= 0:
+                msg = "ERROR: MINIC: Not responding"
+                raise PtsError(msg)
+
+    def init_ep(self):
+        idr =  self.ep_readl(self.EP_REG_IDR)
+        self.ep_writel(self.EP_REG_ECR, self.EP_ECR_TX_EN | self.EP_ECR_RX_EN)
+
+    def reset_phy(self):
+        self.pcs_writel(self.MDIO_MCR, self.MDIO_MCR_PDOWN);
+        self.pcs_writel(self.MDIO_MCR, self.MDIO_MCR_RESET);
+        self.pcs_writel(self.MDIO_MCR, 0);
+
+    def link_up(self):
+        return self.pcs_readl(self.MDIO_MSR) & self.MDIO_MSR_LSTATUS
+
+##-------------------------------------------------------------------------------------------------
+##                                             main                                              --
+##-------------------------------------------------------------------------------------------------
+
+def main(bus,tname,inf,log):
+
+    """
+    tests : SFP J1
+    uses  : pts.bit and sfp_test.py
+    """
+
+    pel = PTS_ERROR_LOGGER(inf,log)
+
+    try:
+
+        # SFP link test
+        msg = "Begin SFP link test"
+        print msg
+        inf.write("\n%s\n" % (msg))
+
+        minic = CMinic(bus, SFP_BASE);
+        minic.init_ep()
+        minic.reset_phy()
+        minic.link_up()
+
+        if minic.link_up():
+            msg = "SFP link up OK"
+            inf.write("%s\n" % (msg))
+        else:
+            msg = "ERROR: SFP high speed link down"
+            pel.set(msg)
+
+        return pel.get()
+
+    except BusException, e:
+        raise PtsError("SKT Exception: %s" % (e))
+
+    except BusWarning, e:
+        raise PtsError("SKT Warning: %s" % (e))
+
+    #finally:
+    #    return pel.get()