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Conv TTL RS485 - Testing
Commit 1126dcb7 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana
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hdl: Changed names of some bits in PTS regs component

parent cb1abd23
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hdl/modules/pts_regs.vhd
View file @ 1126dcb7
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
--------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------
-- File : pts_regs.vhd -- File : pts_regs.vhd
-- Author : auto-generated by wbgen2 from pts_regs.wb -- Author : auto-generated by wbgen2 from pts_regs.wb
-- Created : Wed Nov 12 10:26:43 2014 -- Created : Thu Dec 4 10:03:35 2014
-- Standard : VHDL'87 -- Standard : VHDL'87
--------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------
-- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE pts_regs.wb -- THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE pts_regs.wb
...@@ -29,16 +29,16 @@ entity pts_regs is ...@@ -29,16 +29,16 @@ entity pts_regs is
wb_stall_o : out std_logic; wb_stall_o : out std_logic;
-- Port for std_logic_vector field: 'ID register bits' in reg: 'BIDR' -- Port for std_logic_vector field: 'ID register bits' in reg: 'BIDR'
pts_bidr_i : in std_logic_vector(31 downto 0); pts_bidr_i : in std_logic_vector(31 downto 0);
-- Port for BIT field: 'Front pulse LED enable' in reg: 'CSR' -- Port for BIT field: 'Channel pulse LED enable' in reg: 'CSR'
pts_csr_fledt_o : out std_logic; pts_csr_chledt_o : out std_logic;
-- Port for BIT field: 'Rear pulse LED enable' in reg: 'CSR'
pts_csr_rledt_o : out std_logic;
-- Port for BIT field: 'Status LED enable' in reg: 'CSR' -- Port for BIT field: 'Status LED enable' in reg: 'CSR'
pts_csr_stledt_o : out std_logic; pts_csr_stledt_o : out std_logic;
-- Port for BIT field: 'Rear pulse LED line' in reg: 'CSR'
pts_csr_rledt_o : out std_logic;
-- Port for BIT field: 'TTL test enable' in reg: 'CSR' -- Port for BIT field: 'TTL test enable' in reg: 'CSR'
pts_csr_ttlpt_o : out std_logic; pts_csr_ttlpt_o : out std_logic;
-- Port for BIT field: 'RS485 pulse enable' in reg: 'CSR' -- Port for BIT field: 'Rear pulse enable' in reg: 'CSR'
pts_csr_rs485pt_o : out std_logic; pts_csr_rearpt_o : out std_logic;
-- Port for BIT field: 'RS485 tester card VCC' in reg: 'CSR' -- Port for BIT field: 'RS485 tester card VCC' in reg: 'CSR'
pts_csr_tstcvcc_o : out std_logic; pts_csr_tstcvcc_o : out std_logic;
-- Port for BIT field: 'RS485 tester card MUX enable' in reg: 'CSR' -- Port for BIT field: 'RS485 tester card MUX enable' in reg: 'CSR'
...@@ -88,11 +88,11 @@ end pts_regs; ...@@ -88,11 +88,11 @@ end pts_regs;
architecture syn of pts_regs is architecture syn of pts_regs is
signal pts_csr_fledt_int : std_logic ; signal pts_csr_chledt_int : std_logic ;
signal pts_csr_rledt_int : std_logic ;
signal pts_csr_stledt_int : std_logic ; signal pts_csr_stledt_int : std_logic ;
signal pts_csr_rledt_int : std_logic ;
signal pts_csr_ttlpt_int : std_logic ; signal pts_csr_ttlpt_int : std_logic ;
signal pts_csr_rs485pt_int : std_logic ; signal pts_csr_rearpt_int : std_logic ;
signal pts_csr_tstcvcc_int : std_logic ; signal pts_csr_tstcvcc_int : std_logic ;
signal pts_csr_tstcmuxen_int : std_logic ; signal pts_csr_tstcmuxen_int : std_logic ;
signal pts_csr_tstcs0_int : std_logic ; signal pts_csr_tstcs0_int : std_logic ;
...@@ -126,11 +126,11 @@ begin ...@@ -126,11 +126,11 @@ begin
ack_sreg <= "0000000000"; ack_sreg <= "0000000000";
ack_in_progress <= '0'; ack_in_progress <= '0';
rddata_reg <= "00000000000000000000000000000000"; rddata_reg <= "00000000000000000000000000000000";
pts_csr_fledt_int <= '0'; pts_csr_chledt_int <= '0';
pts_csr_rledt_int <= '0';
pts_csr_stledt_int <= '0'; pts_csr_stledt_int <= '0';
pts_csr_rledt_int <= '0';
pts_csr_ttlpt_int <= '0'; pts_csr_ttlpt_int <= '0';
pts_csr_rs485pt_int <= '0'; pts_csr_rearpt_int <= '0';
pts_csr_tstcvcc_int <= '0'; pts_csr_tstcvcc_int <= '0';
pts_csr_tstcmuxen_int <= '0'; pts_csr_tstcmuxen_int <= '0';
pts_csr_tstcs0_int <= '0'; pts_csr_tstcs0_int <= '0';
...@@ -169,11 +169,11 @@ begin ...@@ -169,11 +169,11 @@ begin
ack_in_progress <= '1'; ack_in_progress <= '1';
when "01" => when "01" =>
if (wb_we_i = '1') then if (wb_we_i = '1') then
pts_csr_fledt_int <= wrdata_reg(0); pts_csr_chledt_int <= wrdata_reg(0);
pts_csr_rledt_int <= wrdata_reg(1); pts_csr_stledt_int <= wrdata_reg(1);
pts_csr_stledt_int <= wrdata_reg(2); pts_csr_rledt_int <= wrdata_reg(2);
pts_csr_ttlpt_int <= wrdata_reg(3); pts_csr_ttlpt_int <= wrdata_reg(3);
pts_csr_rs485pt_int <= wrdata_reg(4); pts_csr_rearpt_int <= wrdata_reg(4);
pts_csr_tstcvcc_int <= wrdata_reg(5); pts_csr_tstcvcc_int <= wrdata_reg(5);
pts_csr_tstcmuxen_int <= wrdata_reg(6); pts_csr_tstcmuxen_int <= wrdata_reg(6);
pts_csr_tstcs0_int <= wrdata_reg(7); pts_csr_tstcs0_int <= wrdata_reg(7);
...@@ -183,11 +183,11 @@ begin ...@@ -183,11 +183,11 @@ begin
pts_csr_i2c_err_load_o <= '1'; pts_csr_i2c_err_load_o <= '1';
pts_csr_i2c_wdto_load_o <= '1'; pts_csr_i2c_wdto_load_o <= '1';
end if; end if;
rddata_reg(0) <= pts_csr_fledt_int; rddata_reg(0) <= pts_csr_chledt_int;
rddata_reg(1) <= pts_csr_rledt_int; rddata_reg(1) <= pts_csr_stledt_int;
rddata_reg(2) <= pts_csr_stledt_int; rddata_reg(2) <= pts_csr_rledt_int;
rddata_reg(3) <= pts_csr_ttlpt_int; rddata_reg(3) <= pts_csr_ttlpt_int;
rddata_reg(4) <= pts_csr_rs485pt_int; rddata_reg(4) <= pts_csr_rearpt_int;
rddata_reg(5) <= pts_csr_tstcvcc_int; rddata_reg(5) <= pts_csr_tstcvcc_int;
rddata_reg(6) <= pts_csr_tstcmuxen_int; rddata_reg(6) <= pts_csr_tstcmuxen_int;
rddata_reg(7) <= pts_csr_tstcs0_int; rddata_reg(7) <= pts_csr_tstcs0_int;
...@@ -259,16 +259,16 @@ begin ...@@ -259,16 +259,16 @@ begin
-- Drive the data output bus -- Drive the data output bus
wb_dat_o <= rddata_reg; wb_dat_o <= rddata_reg;
-- ID register bits -- ID register bits
-- Front pulse LED enable -- Channel pulse LED enable
pts_csr_fledt_o <= pts_csr_fledt_int; pts_csr_chledt_o <= pts_csr_chledt_int;
-- Rear pulse LED enable
pts_csr_rledt_o <= pts_csr_rledt_int;
-- Status LED enable -- Status LED enable
pts_csr_stledt_o <= pts_csr_stledt_int; pts_csr_stledt_o <= pts_csr_stledt_int;
-- Rear pulse LED line
pts_csr_rledt_o <= pts_csr_rledt_int;
-- TTL test enable -- TTL test enable
pts_csr_ttlpt_o <= pts_csr_ttlpt_int; pts_csr_ttlpt_o <= pts_csr_ttlpt_int;
-- RS485 pulse enable -- Rear pulse enable
pts_csr_rs485pt_o <= pts_csr_rs485pt_int; pts_csr_rearpt_o <= pts_csr_rearpt_int;
-- RS485 tester card VCC -- RS485 tester card VCC
pts_csr_tstcvcc_o <= pts_csr_tstcvcc_int; pts_csr_tstcvcc_o <= pts_csr_tstcvcc_int;
-- RS485 tester card MUX enable -- RS485 tester card MUX enable
......
hdl/modules/pts_regs.wb
View file @ 1126dcb7
...@@ -60,27 +60,27 @@ peripheral { ...@@ -60,27 +60,27 @@ peripheral {
prefix = "csr"; prefix = "csr";
field { field {
name = "Front pulse LED enable"; name = "Channel pulse LED enable";
prefix = "fledt"; prefix = "chledt";
description = "1 -- Enable front panel LED sequencing \ 0 -- No effect"; description = "1 -- Enable channel LED sequencing \ 0 -- No effect";
type = BIT; type = BIT;
access_bus = READ_WRITE; access_bus = READ_WRITE;
access_dev = READ_ONLY; access_dev = READ_ONLY;
}; };
field { field {
name = "Rear pulse LED enable"; name = "Status LED enable";
prefix = "rledt"; prefix = "stledt";
description = "1 -- Enable rear panel LED sequencing \ 0 -- No effect"; description = "1 -- Enable front panel bicolor LED sequencing \ 0 -- No effect";
type = BIT; type = BIT;
access_bus = READ_WRITE; access_bus = READ_WRITE;
access_dev = READ_ONLY; access_dev = READ_ONLY;
}; };
field { field {
name = "Status LED enable"; name = "Rear pulse LED line";
prefix = "stledt"; prefix = "rledt";
description = "1 -- Enable front panel bicolor LED sequencing \ 0 -- No effect"; description = "1 -- Set LED line high \ 0 -- No effect";
type = BIT; type = BIT;
access_bus = READ_WRITE; access_bus = READ_WRITE;
access_dev = READ_ONLY; access_dev = READ_ONLY;
...@@ -96,9 +96,9 @@ peripheral { ...@@ -96,9 +96,9 @@ peripheral {
}; };
field { field {
name = "RS485 pulse enable"; name = "Rear pulse enable";
prefix = "rs485pt"; prefix = "rearpt";
description = "1 -- Enable RS485 pulse generation \ 0 -- No effect"; description = "1 -- Enable rear panel pulse generation \ 0 -- No effect";
type = BIT; type = BIT;
access_bus = READ_WRITE; access_bus = READ_WRITE;
access_dev = READ_ONLY; access_dev = READ_ONLY;
......
hdl/top/pts.vhd
View file @ 1126dcb7
...@@ -280,15 +280,15 @@ architecture arch of pts is ...@@ -280,15 +280,15 @@ architecture arch of pts is
-- Port for std_logic_vector field: 'ID register bits' in reg: 'BIDR' -- Port for std_logic_vector field: 'ID register bits' in reg: 'BIDR'
pts_bidr_i : in std_logic_vector(31 downto 0); pts_bidr_i : in std_logic_vector(31 downto 0);
-- Port for BIT field: 'Front pulse LED enable' in reg: 'CSR' -- Port for BIT field: 'Front pulse LED enable' in reg: 'CSR'
pts_csr_fledt_o : out std_logic; pts_csr_chledt_o : out std_logic;
-- Port for BIT field: 'Rear pulse LED enable' in reg: 'CSR'
pts_csr_rledt_o : out std_logic;
-- Port for BIT field: 'Status LED enable' in reg: 'CSR' -- Port for BIT field: 'Status LED enable' in reg: 'CSR'
pts_csr_stledt_o : out std_logic; pts_csr_stledt_o : out std_logic;
-- Port for BIT field: 'Rear pulse LED enable' in reg: 'CSR'
pts_csr_rledt_o : out std_logic;
-- Port for BIT field: 'TTL test enable' in reg: 'CSR' -- Port for BIT field: 'TTL test enable' in reg: 'CSR'
pts_csr_ttlpt_o : out std_logic; pts_csr_ttlpt_o : out std_logic;
-- Port for BIT field: 'RS485 pulse enable' in reg: 'CSR' -- Port for BIT field: 'RS485 pulse enable' in reg: 'CSR'
pts_csr_rs485pt_o : out std_logic; pts_csr_rearpt_o : out std_logic;
-- Port for BIT field: 'RS485 tester card VCC' in reg: 'CSR' -- Port for BIT field: 'RS485 tester card VCC' in reg: 'CSR'
pts_csr_tstcvcc_o : out std_logic; pts_csr_tstcvcc_o : out std_logic;
-- Port for BIT field: 'RS485 tester card MUX enable' in reg: 'CSR' -- Port for BIT field: 'RS485 tester card MUX enable' in reg: 'CSR'
...@@ -945,11 +945,11 @@ begin ...@@ -945,11 +945,11 @@ begin
pts_bidr_i => c_board_id, pts_bidr_i => c_board_id,
-- PTS control register -- PTS control register
pts_csr_fledt_o => pulse_led_en, pts_csr_chledt_o => pulse_led_en,
pts_csr_rledt_o => open,
pts_csr_stledt_o => stat_led_en, pts_csr_stledt_o => stat_led_en,
pts_csr_rledt_o => open,
pts_csr_ttlpt_o => front_pulse_en, pts_csr_ttlpt_o => front_pulse_en,
pts_csr_rs485pt_o => rear_pulse_en, pts_csr_rearpt_o => rear_pulse_en,
pts_csr_tstcvcc_o => tester_vcc, pts_csr_tstcvcc_o => tester_vcc,
pts_csr_tstcmuxen_o => tester_mux_en, pts_csr_tstcmuxen_o => tester_mux_en,
pts_csr_tstcs0_o => tester_s0, pts_csr_tstcs0_o => tester_s0,
......
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