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Conv TTL Blocking
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Conv TTL Blocking
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[RTM-BLO-V1] Isolation guards around input connectors
#47
· opened
Jun 08, 2012
by
Carlos Gil Soriano
feature
CLOSED
6
updated
Feb 12, 2019
[ELMA I2C] CONV-TLL-BLO touching ELMA chasis
#46
· opened
Jun 19, 2012
by
Carlos Gil Soriano
bug
CLOSED
0
updated
Feb 12, 2019
[Front & Rear Panels] Change of red LED array
#45
· opened
Aug 03, 2012
by
Carlos Gil Soriano
feature
CLOSED
0
updated
Feb 12, 2019
[Schmitt Triggers] Change of logic family for Schmitt triggers
#44
· opened
Oct 03, 2012
by
Carlos Gil Soriano
feature
CLOSED
1
updated
Feb 12, 2019
[DACs] Separate control lines
#43
· opened
Oct 03, 2012
by
Carlos Gil Soriano
feature
CLOSED
0
updated
Feb 12, 2019
[Jitter] Analog deglitching
#42
· opened
Oct 18, 2012
by
Carlos Gil Soriano
feature
CLOSED
2
updated
Feb 12, 2019
[Power Supply] Obsolete soon component
#41
· opened
Nov 07, 2012
by
Carlos Gil Soriano
bug
CLOSED
3
updated
Feb 12, 2019
[BLO-V2] Blocking pulse is 21V instead of 24V
#40
· opened
Jan 17, 2013
by
Carlos Gil Soriano
bug
CLOSED
4
updated
Feb 12, 2019
[BLO-V2] Do not mount push button PB1
#39
· opened
Jan 25, 2013
by
Carlos Gil Soriano
feature
CLOSED
3
updated
Feb 12, 2019
[BLO-V2] No LEDs on INV-TTL inputs
#38
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
feature
CLOSED
4
updated
Feb 12, 2019
[RTM-V1] Guard traces between differential lines
#37
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[RTMP-V1] Wrong project reference number on piggyback front panel
#36
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
bug
CLOSED
1
updated
Feb 12, 2019
[RTM-V1] Project link incomplete or wrong on silkscreen
#35
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[RTM-V2] Different RTM detection lines for the V2 boards
#34
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
feature
CLOSED
1
updated
Feb 12, 2019
[BLO-V2] Front panels should be the same as for RS-485 converters
#33
· opened
Feb 20, 2013
by
Theodor-Adrian Stana
feature
CLOSED
2
updated
Feb 12, 2019
[RTMP-BLO/RS-V1] RTMP detection wrong in V1 panels
#32
· opened
Feb 21, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[BLO-V2] Mainboard power-on reset circuit has long timing constant
#31
· opened
Mar 01, 2013
by
Theodor-Adrian Stana
feature
CLOSED
4
updated
Feb 12, 2019
[BLO-V2][RTMM] Changes to front and rear panels' design and assembly documents
#30
· opened
Mar 28, 2013
by
Theodor-Adrian Stana
bug
CLOSED
4
updated
Feb 12, 2019
[BLO-V2] Decoupling capacitor connections wrong
#29
· opened
Apr 05, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[BLO-V2] Confusing net names
#28
· opened
Apr 05, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
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