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Conv TTL Blocking
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Conv TTL Blocking
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PTS: PTS test for golden gateware fails
#6
· opened
Jul 21, 2017
by
Denia Bouhired-Ferrag
bug
CLOSED
2
updated
Feb 12, 2019
HW: Incorrect silkscreen label on PCB version resistor
#7
· opened
Jul 05, 2017
by
Denia Bouhired-Ferrag
bug
CLOSED
3
updated
Feb 12, 2019
Overshoot in blocking output in V3 prototype
#10
· opened
Nov 01, 2016
by
Denia Bouhired-Ferrag
bug
CLOSED
3
updated
Feb 12, 2019
Dip switch re-assigned a different function on V3
#11
· opened
Aug 26, 2016
by
Denia Bouhired-Ferrag
bug
CLOSED
1
updated
Feb 12, 2019
Pulldown resistors on TTL outputs
#14
· opened
Apr 22, 2016
by
Denia Bouhired-Ferrag
bug
CLOSED
1
updated
Feb 12, 2019
V2-1: Hot plugging blows main board (MOSFETs)
#16
· opened
Jul 28, 2015
by
Erik van der Bij
bug
CLOSED
4
updated
Feb 12, 2019
Crosstalk on blocking channels
#18
· opened
Apr 10, 2014
by
Theodor-Adrian Stana
bug
CLOSED
4
updated
Feb 12, 2019
[BLO-V2] Replace R147 for a capacitor
#19
· opened
Mar 03, 2014
by
Theodor-Adrian Stana
bug
CLOSED
3
updated
Feb 12, 2019
[BLO-V2] Silkscreen for electrolytic capacitors
#20
· opened
Jan 31, 2014
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[BLO-V2] Silkscreen for T10, T11, T12
#21
· opened
Jan 29, 2014
by
Theodor-Adrian Stana
bug
CLOSED
1
updated
Feb 12, 2019
[BLO-V2] Displacement of J3 connector
#22
· opened
Oct 01, 2013
by
Theodor-Adrian Stana
bug
CLOSED
1
updated
Feb 12, 2019
[BLO-V2] Front panel pulse LED leads too long
#24
· opened
Jun 05, 2013
by
Theodor-Adrian Stana
bug
CLOSED
3
updated
Feb 12, 2019
[BLO-V2] Confusing net names
#28
· opened
Apr 05, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[BLO-V2] Decoupling capacitor connections wrong
#29
· opened
Apr 05, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[BLO-V2][RTMM] Changes to front and rear panels' design and assembly documents
#30
· opened
Mar 28, 2013
by
Theodor-Adrian Stana
bug
CLOSED
4
updated
Feb 12, 2019
[RTMP-BLO/RS-V1] RTMP detection wrong in V1 panels
#32
· opened
Feb 21, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[RTM-V1] Project link incomplete or wrong on silkscreen
#35
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[RTMP-V1] Wrong project reference number on piggyback front panel
#36
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
bug
CLOSED
1
updated
Feb 12, 2019
[RTM-V1] Guard traces between differential lines
#37
· opened
Jan 31, 2013
by
Theodor-Adrian Stana
bug
CLOSED
2
updated
Feb 12, 2019
[BLO-V2] Blocking pulse is 21V instead of 24V
#40
· opened
Jan 17, 2013
by
Carlos Gil Soriano
bug
CLOSED
4
updated
Feb 12, 2019
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