Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
C
Conv TTL Blocking
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
5
Issues
5
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Conv TTL Blocking
Commits
fa473234
Commit
fa473234
authored
Sep 25, 2012
by
gilsoriano
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Nighty night... Corrected top and core. Now it is all about tb...
parent
08f7ee8b
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
72 additions
and
55 deletions
+72
-55
m25p32_core.vhd
hdl/m25p32/rtl/m25p32_core.vhd
+39
-33
m25p32_top.vhd
hdl/m25p32/rtl/m25p32_top.vhd
+31
-20
m25p32_top_tb.vhd
hdl/m25p32/test/m25p32_top_tb.vhd
+2
-2
No files found.
hdl/m25p32/rtl/m25p32_core.vhd
View file @
fa473234
...
...
@@ -55,9 +55,9 @@ entity m25p32_core is
sclk_o
:
out
STD_LOGIC
;
ss_n_o
:
out
STD_LOGIC
;
s_wr_data_i
:
in
STD_LOGIC_VECTOR
(
g_PAGE_SIZE
*
8
-
1
downto
0
);
s_rd_data_o
:
out
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
SR_m25p32_i
:
in
STD_LOGIC_VECTOR
(
r_SR_m25p32
'length
-
1
downto
0
);
wr_data_i
:
in
STD_LOGIC_VECTOR
(
g_PAGE_SIZE
*
8
-
1
downto
0
);
rd_data_o
:
out
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
SR_m25p32_i
:
in
STD_LOGIC_VECTOR
(
r_SR_m25p32
'
a_
length
-
1
downto
0
);
FMI_io
:
inout
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
)
);
...
...
@@ -107,13 +107,14 @@ begin
s_FMI
.
OP
<=
s_FMI_tmp
.
OP
;
s_FMI
.
PG
<=
s_FMI_tmp
.
PG
;
s_FMI
.
SCT
<=
s_FMI_tmp
.
SCT
;
FMI_io
.
OPA
<=
s_FMI
.
OPA
;
FMI_io
.
OPF
<=
s_FMI
.
OPF
;
--! Not the most stylish way of doing the assignment, but it works
FMI_io
(
1
)
<=
s_FMI
.
OPA
;
FMI_io
(
2
)
<=
s_FMI
.
OPF
;
s_SPI0_slv
<=
f_STD_LOGIC_VECTOR
(
s_SPI0
);
s_SPI1_slv
<=
f_STD_LOGIC_VECTOR
(
s_SPI1
);
s_SPI2
<=
f_SPI2
(
s_SPI2_slv
);
s_SPI3
<=
f_SPI
2
(
s_SPI3_slv
);
s_SPI3
<=
f_SPI
3
(
s_SPI3_slv
);
inst_spi_master_core
:
spi_master_core
...
...
@@ -160,9 +161,9 @@ begin
--! s_MEM_fsm_d0 One clock delay of s_MEM_fsm
p_comb_SPIx
:
process
(
s_MEM_fsm
,
s_MEM_fsm_d0
)
procedure
registers_setup
(
operation
:
s_FMI
.
OP
)
is
procedure
registers_setup
(
operation
:
t_operations
)
is
begin
case
s_FMI
.
OP
is
case
operation
is
when
RDID
=>
s_SPI0
<=
c_SPI0_RDID
;
s_SPI1
<=
c_SPI1_RDID
;
...
...
@@ -190,9 +191,9 @@ begin
end
case
;
end
procedure
;
procedure
place_inst
(
operation
:
s_FMI
.
OP
)
is
procedure
place_inst
(
operation
:
t_operations
)
is
begin
case
s_FMI
.
OP
is
case
operation
is
when
RDID
=>
s_inst_spi
<=
c_RDID_INST
;
when
RDSR
=>
...
...
@@ -211,13 +212,13 @@ begin
end
case
;
end
procedure
;
procedure
place_addr
(
operation
:
s_FMI
.
OP
)
is
procedure
place_addr
(
operation
:
t_operations
)
is
constant
c_offset
:
NATURAL
:
=
c_SECTOR_BITS
+
c_PAGES_PER_SECTOR_BITS
-
1
+
3
;
variable
v_
s_
addr_spi
:
STD_LOGIC_VECTOR
(
23
downto
0
);
variable
v_addr_spi
:
STD_LOGIC_VECTOR
(
23
downto
0
);
begin
v_addr_spi
:
=
(
others
=>
'0'
);
case
s_FMI
.
OP
is
case
operation
is
when
READ
=>
v_addr_spi
(
c_offset
downto
0
)
:
=
s_FMI
.
SCT
&
s_FMI
.
PG
...
...
@@ -239,10 +240,13 @@ begin
s_addr_spi
<=
v_addr_spi
;
end
procedure
;
procedure
place_data
(
operation
:
s_FMI
.
OP
)
is
procedure
place_data
(
operation
:
t_operations
)
is
begin
s_data_i_spi
<=
SR_m25p32_i
when
s_FMI
.
OP
=
WRSR
else
s_wr_data_i
;
if
operation
=
WRSR
then
s_data_i_spi
<=
SR_m25p32_i
;
else
s_data_i_spi
<=
wr_data_i
;
end
if
;
end
procedure
;
begin
...
...
@@ -274,20 +278,20 @@ begin
begin
case
s_MEM_fsm
is
when
R0_RESET
=>
s_
CTRL
.
OPA
<=
c_CTRL
_default
.
OPA
;
s_
CTRL
.
OPF
<=
c_CTRL
_default
.
OPF
;
s_
FMI
.
OPA
<=
c_FMI
_default
.
OPA
;
s_
FMI
.
OPF
<=
c_FMI
_default
.
OPF
;
when
S0_IDLE
=>
s_
CTRL
.
OPA
<=
'0'
;
s_
CTRL
.
OPF
<=
'0'
;
s_
FMI
.
OPA
<=
'0'
;
s_
FMI
.
OPF
<=
'0'
;
when
Q0_END
=>
s_
CTRL
.
OPA
<=
'1'
;
s_
CTRL
.
OPF
<=
'1'
;
s_
FMI
.
OPA
<=
'1'
;
s_
FMI
.
OPF
<=
'1'
;
when
Q1_ERROR
=>
s_
CTRL
.
OPA
<=
'1'
;
s_
CTRL
.
OPF
<=
'1'
;
s_
FMI
.
OPA
<=
'1'
;
s_
FMI
.
OPF
<=
'1'
;
when
others
=>
s_
CTRL
.
OPA
<=
'1'
;
s_
CTRL
.
OPF
<=
'0'
;
s_
FMI
.
OPA
<=
'1'
;
s_
FMI
.
OPF
<=
'0'
;
end
case
;
end
process
p_comb_OP
;
...
...
@@ -319,9 +323,11 @@ begin
--! Easiest way to add concurrency while performing an SPI
--! operation.
if
s_FMI
.
OP
/=
WRSR
then
s_data_i_spi
<=
s
_data_i
;
s_data_i_spi
<=
wr
_data_i
;
else
s_data_i_spi
<=
s_data_i
;
--! TODO: check if this is correctly positioned
s_data_i_spi
(
r_SR_m25p32
'a_length
-
1
downto
0
)
<=
SR_m25P32_i
;
end
if
;
when
S1_WREN
=>
if
s_SPI2
.
SENT_OP
=
'1'
then
...
...
@@ -334,15 +340,15 @@ begin
s_MEM_fsm
<=
Q0_END
;
end
if
;
when
S3B_WRDI
=>
s_MEM_fsm
<=
S3_WRDI
;
s_MEM_fsm
<=
S3_WRDI
;
when
S3_WRDI
=>
if
s_SPI2
.
SENT_OP
=
'1'
then
s_MEM_fsm
<=
Q0_END
;
end
if
;
when
Q0_END
=>
s_MEM_fsm
<=
s_
R0_RESET
;
when
Q1_ERROR
=>
s_MEM_fsm
<=
s_
R0_RESET
;
when
Q0_END
=>
s_MEM_fsm
<=
R0_RESET
;
when
Q1_ERROR
=>
s_MEM_fsm
<=
R0_RESET
;
when
others
=>
end
case
;
end
if
;
...
...
hdl/m25p32/rtl/m25p32_top.vhd
View file @
fa473234
...
...
@@ -65,26 +65,31 @@ end m25p32_top;
architecture
Behavioral
of
m25p32_top
is
signal
s_wr_data
:
STD_LOGIC_VECTOR
(
c_DATA_LENGTH
*
8
-
1
downto
0
);
signal
s_rd_data
:
STD_LOGIC_VECTOR
(
c_DATA_LENGTH
*
8
-
1
downto
0
);
signal
s_rd_data
:
STD_LOGIC_VECTOR
(
c_READ_LENGTH
*
8
-
1
downto
0
);
signal
s_SR_m25p32
:
STD_LOGIC_VECTOR
(
r_SR_m25p32
'a_length
-
1
downto
0
);
signal
s_FM
OH
:
STD_LOGIC_VECTOR
(
r_FMOH
'a_length
-
1
downto
0
);
signal
s_FM
I
:
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
);
component
m25p32_core
is
generic
(
g_INST_LENGTH
:
NATURAL
:
=
c_INST_LENGTH
;
g_ADDR_LENGTH
:
NATURAL
:
=
c_ADDR_LENGTH
;
g_PAGE_SIZE
:
NATURAL
:
=
c_PAGE_SIZE
;
g_READ_LENGTH
:
NATURAL
:
=
c_READ_LENGTH
);
g_INST_LENGTH
:
NATURAL
:
=
c_INST_LENGTH
;
g_ADDR_LENGTH
:
NATURAL
:
=
c_ADDR_LENGTH
;
g_PAGE_SIZE
:
NATURAL
:
=
c_PAGE_SIZE
;
g_READ_LENGTH
:
NATURAL
:
=
c_READ_LENGTH
);
port
(
wb_rst_i
:
in
STD_LOGIC
;
wb_clk
:
in
STD_LOGIC
;
wb_rst_i
:
in
STD_LOGIC
;
wb_clk
:
in
STD_LOGIC
;
mosi_o
:
out
STD_LOGIC
;
miso_i
:
in
STD_LOGIC
;
sclk_o
:
out
STD_LOGIC
;
ss_n_o
:
out
STD_LOGIC
;
mosi_o
:
out
STD_LOGIC
;
miso_i
:
in
STD_LOGIC
;
sclk_o
:
out
STD_LOGIC
;
ss_n_o
:
out
STD_LOGIC
;
FMOH_io
:
inout
STD_LOGIC_VECTOR
(
r_FMOH
'a_length
-
1
downto
0
)
wr_data_i
:
in
STD_LOGIC_VECTOR
(
g_PAGE_SIZE
*
8
-
1
downto
0
);
rd_data_o
:
out
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
SR_m25p32_i
:
in
STD_LOGIC_VECTOR
(
r_SR_m25p32
'a_length
-
1
downto
0
);
FMI_io
:
inout
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
)
);
end
component
;
...
...
@@ -110,10 +115,11 @@ architecture Behavioral of m25p32_top is
wb_rty_o
:
out
STD_LOGIC
;
wb_err_o
:
out
STD_LOGIC
;
wr_data_o
:
out
STD_LOGIC_VECTOR
(
c_DATA_LENGTH
*
8
-
1
downto
0
);
rd_data_i
:
in
STD_LOGIC_VECTOR
(
c_DATA_LENGTH
*
8
-
1
downto
0
);
wr_data_o
:
out
STD_LOGIC_VECTOR
(
g_DATA_LENGTH
*
8
-
1
downto
0
);
rd_data_i
:
in
STD_LOGIC_VECTOR
(
g_READ_LENGTH
*
8
-
1
downto
0
);
SR_m25p32_o
:
out
STD_LOGIC_VECTOR
(
r_SR_m25p32
'a_length
-
1
downto
0
);
FM
OH_io
:
inout
STD_LOGIC_VECTOR
(
r_FMOH
'a_length
-
1
downto
0
)
FM
I_io
:
inout
STD_LOGIC_VECTOR
(
r_FMI
'a_length
-
1
downto
0
)
);
end
component
;
...
...
@@ -129,7 +135,11 @@ begin
sclk_o
=>
prom_cclk_o
,
ss_n_o
=>
prom_cs0_b_n_o
,
FMOH_io
=>
s_FMOH
wr_data_i
=>
s_wr_data
,
rd_data_o
=>
s_rd_data
,
SR_m25p32_i
=>
s_SR_m25p32
,
FMI_io
=>
s_FMI
);
inst_m25p32_regs
:
m25p32_regs
...
...
@@ -148,10 +158,11 @@ begin
wb_rty_o
=>
wb_rty_o
,
wb_err_o
=>
wb_err_o
,
wr_data_o
=>
s_wr_data_o
,
rd_data_i
=>
s_rd_data_i
,
wr_data_o
=>
s_wr_data
,
rd_data_i
=>
s_rd_data
,
SR_m25p32_o
=>
s_SR_m25p32
,
FM
OH_io
=>
s_FMOH
FM
I_io
=>
s_FMI
);
end
Behavioral
;
hdl/m25p32/test/m25p32_top_tb.vhd
View file @
fa473234
...
...
@@ -22,8 +22,8 @@ library IEEE;
library
work
;
use
IEEE
.
STD_LOGIC_1164
.
ALL
;
use
IEEE
.
NUMERIC_STD
.
ALL
;
use
work
.
spi_master_pkg
.
ALL
;
use
work
.
m25p32_pkg
.
ALL
;
use
work
.
serializer_sim_pkg
.
ALL
;
use
work
.
spi_analyser_pkg
.
ALL
;
entity
m25p32_top_tb
is
...
...
@@ -32,7 +32,7 @@ entity m25p32_top_tb is
architecture
Behavioral
of
m25p32_top_tb
is
signal
wb_rst_i
:
STD_LOGIC
;
signal
s_rst
:
STD_LOGIC
;
signal
wb_clk
:
STD_LOGIC
;
signal
s_wb_we
:
STD_LOGIC
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment