... | ... | @@ -29,7 +29,7 @@ pins in the VME64x J1 connector. |
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- VME64x double-height form factor using Front and Rear Transition
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Module
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- The output pulse is a CERN level standard, [Standard
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Blocking](https://www.ohwr.org/790).
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Blocking](https://www.ohwr.org/project/conv-ttl-blo/uploads/8ba57dff4f18540c947830f70e8c8ead/BlockingSpecification.pdf).
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- 6 conversion channels. Every channel has:
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- A TTL input in the front panel.
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- A TTL output in the front panel.
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... | ... | @@ -272,5 +272,5 @@ HDLstatusIcon.png:/project/conv-ttl-blo/wikis/HDLStatus |
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-----
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Carlos Gil Soriano, Erik van der Bij - 8 May 2012
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Carlos Gil Soriano, Erik van der Bij - 22 August 2012
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