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## Release notes
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- Pulse repetition with max. duty cycle of 1/5; input pulses with duty
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cycle \>1/5 are rejected
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- Pulse repetition with max. duty cycle of 1/200; input pulses with
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duty cycle \>1/200 are rejected
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- I2C to Wishbone bridge following the protocol defined together with
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ELMA
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- Dedicated CONV-TTL-BLO registers (see full memory map in the HDL
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- Raw binary files of golden
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bitstream:
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- [golden.bin](https://www.ohwr.org/2801)
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- [golden.bit](https://www.ohwr.org/2802)
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- To create a complete bitstream (golden + release) for direct
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download to the flash, see
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[here](/Releases#preparing-a-bitstream-containing-the-golden-bitstream-for-multiboot)
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- [golden.bin](https://www.ohwr.org/2818)
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- [golden.bit](https://www.ohwr.org/2819)
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## Sources
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