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Beam Positoning Monitor - Software
Commit 1dd90fe8 authored by Lucas Russo's avatar Lucas Russo
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sm_io/*/fmc250m_4ch/*: add independent testmode function for each ADC

parent d6b678c7
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Showing with 124 additions and 56 deletions
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_codes.h
View file @ 1dd90fe8
...@@ -110,9 +110,15 @@ ...@@ -110,9 +110,15 @@
#define FMC250M_4CH_NAME_RST_ADCS "fmc250m_4ch_rst_adcs" #define FMC250M_4CH_NAME_RST_ADCS "fmc250m_4ch_rst_adcs"
#define FMC250M_4CH_OPCODE_RST_DIV_ADCS 46 #define FMC250M_4CH_OPCODE_RST_DIV_ADCS 46
#define FMC250M_4CH_NAME_RST_DIV_ADCS "fmc250m_4ch_rst_div_adcs" #define FMC250M_4CH_NAME_RST_DIV_ADCS "fmc250m_4ch_rst_div_adcs"
#define FMC250M_4CH_OPCODE_TESTMODE 47 #define FMC250M_4CH_OPCODE_TESTMODE0 47
#define FMC250M_4CH_NAME_TESTMODE "fmc250m_4ch_test_mode" #define FMC250M_4CH_NAME_TESTMODE0 "fmc250m_4ch_test_mode0"
#define FMC250M_4CH_OPCODE_END 48 #define FMC250M_4CH_OPCODE_TESTMODE1 48
#define FMC250M_4CH_NAME_TESTMODE1 "fmc250m_4ch_test_mode1"
#define FMC250M_4CH_OPCODE_TESTMODE2 49
#define FMC250M_4CH_NAME_TESTMODE2 "fmc250m_4ch_test_mode2"
#define FMC250M_4CH_OPCODE_TESTMODE3 50
#define FMC250M_4CH_NAME_TESTMODE3 "fmc350m_4ch_test_mode3"
#define FMC250M_4CH_OPCODE_END 51
/* Messaging Reply OPCODES */ /* Messaging Reply OPCODES */
#define FMC250M_4CH_REPLY_TYPE uint32_t #define FMC250M_4CH_REPLY_TYPE uint32_t
......
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.c
View file @ 1dd90fe8
...@@ -50,14 +50,23 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent) ...@@ -50,14 +50,23 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
err_num_fmc250m_4ch_smios); err_num_fmc250m_4ch_smios);
/* Setup ISLA216P ADC SPI communication */ /* Setup ISLA216P ADC SPI communication */
self->smch_isla216p_adc0 = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS, 0, 0); uint32_t i;
ASSERT_ALLOC(self->smch_isla216p_adc0, err_smch_isla216p_adc0); for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
self->smch_isla216p_adc1 = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS, 1, 0); self->smch_isla216p_adc[i] = NULL;
ASSERT_ALLOC(self->smch_isla216p_adc1, err_smch_isla216p_adc1); self->smch_isla216p_adc[i] = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS,
self->smch_isla216p_adc2 = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS, 2, 0); fmc250m_4ch_isla216p_addr[inst_id][i], 0);
ASSERT_ALLOC(self->smch_isla216p_adc2, err_smch_isla216p_adc2); ASSERT_ALLOC(self->smch_isla216p_adc[i], err_smch_isla216p_adc);
self->smch_isla216p_adc3 = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS, 3, 0);
ASSERT_ALLOC(self->smch_isla216p_adc3, err_smch_isla216p_adc3); uint8_t chipid = 0;
uint8_t chipver = 0;
/* Read ISLA216P ID */
smch_isla216p_get_chipid (self->smch_isla216p_adc[i], &chipid);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_WARN, "[sm_io:fmc250m_4ch_core] ISLA216P0 CHIPID: 0x%02X\n", chipid);
/* Read ISLA216P Version */
smch_isla216p_get_chipver (self->smch_isla216p_adc[i], &chipver);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_WARN, "[sm_io:fmc250m_4ch_core] ISLA216P0 CHIPVER: 0x%02X\n", chipver);
}
/* FMC250M_4CH isntance 0 is the one controlling this CI */ /* FMC250M_4CH isntance 0 is the one controlling this CI */
/* FIXME: This breaks generality for this class */ /* FIXME: This breaks generality for this class */
...@@ -66,6 +75,7 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent) ...@@ -66,6 +75,7 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
" addr: 0x%08X, Inst ID: %u\n", fmc250m_4ch_pca9547_addr[inst_id], " addr: 0x%08X, Inst ID: %u\n", fmc250m_4ch_pca9547_addr[inst_id],
inst_id); inst_id);
/* FPGA I2C Switch */ /* FPGA I2C Switch */
#if 0
self->smch_pca9547 = smch_pca9547_new (parent, FMC_250M_EEPROM_I2C_OFFS, self->smch_pca9547 = smch_pca9547_new (parent, FMC_250M_EEPROM_I2C_OFFS,
fmc250m_4ch_pca9547_addr[inst_id], 0); fmc250m_4ch_pca9547_addr[inst_id], 0);
ASSERT_ALLOC(self->smch_pca9547, err_smch_pca9547_alloc); ASSERT_ALLOC(self->smch_pca9547, err_smch_pca9547_alloc);
...@@ -74,15 +84,21 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent) ...@@ -74,15 +84,21 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
smch_pca9547_en_chan (self->smch_pca9547, FMC250M_4CH_DFLT_PCA9547_CFG); smch_pca9547_en_chan (self->smch_pca9547, FMC250M_4CH_DFLT_PCA9547_CFG);
} }
else { else {
#endif
self->smch_pca9547 = NULL; self->smch_pca9547 = NULL;
} }
DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc250m_4ch_core] 24AA64 initializing, " DBE_DEBUG (DBG_SM_IO | DBG_LVL_TRACE, "[sm_io:fmc250m_4ch_core] 24AA64 initializing, "
"addr: 0x%08X, Inst ID: %u\n", fmc250m_4ch_24aa64_addr[inst_id], "addr: 0x%08X, Inst ID: %u\n", fmc250m_4ch_24aa64_addr[inst_id],
inst_id); inst_id);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO,
"[sm_io:fmc250m_4ch_core] pre new EEPROM 24AA64 data: 0x%08X\n", 0);
#if 0
/* EEPROM is on the same I2C bus as the LM75A */ /* EEPROM is on the same I2C bus as the LM75A */
self->smch_24aa64 = smch_24aa64_new (parent, FMC_250M_EEPROM_I2C_OFFS, self->smch_24aa64 = smch_24aa64_new (parent, FMC_250M_EEPROM_I2C_OFFS,
fmc250m_4ch_24aa64_addr[inst_id], 0); fmc250m_4ch_24aa64_addr[inst_id], 0);
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO,
"[sm_io:fmc250m_4ch_core] post new 24AA64 data: 0x%08X\n", 0);
ASSERT_ALLOC(self->smch_24aa64, err_smch_24aa64_alloc); ASSERT_ALLOC(self->smch_24aa64, err_smch_24aa64_alloc);
uint32_t data_24aa64; uint32_t data_24aa64;
...@@ -108,16 +124,19 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent) ...@@ -108,16 +124,19 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
ASSERT_TEST(data_24aa64_rb == data_24aa64, "[sm_io:fmc250m_4ch_core] EEPROM 24AA64 readback failed", ASSERT_TEST(data_24aa64_rb == data_24aa64, "[sm_io:fmc250m_4ch_core] EEPROM 24AA64 readback failed",
err_smch_ad9510_alloc); err_smch_ad9510_alloc);
#endif #endif
/* Read EEPROM */ /* Read EEPROM */
data_24aa64 = 0x0; data_24aa64 = 0x0;
smch_24aa64_read_block (self->smch_24aa64, FMC250M_4CH_EEPROM_START_ADDR, smch_24aa64_read_block (self->smch_24aa64, FMC250M_4CH_EEPROM_START_ADDR,
&data_24aa64, sizeof (data_24aa64)); &data_24aa64, sizeof (data_24aa64));
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO,
"[sm_io:fmc250m_4ch_core] EEPROM 24AA64 data: 0x%08X\n", data_24aa64); "[sm_io:fmc250m_4ch_core] EEPROM 24AA64 data: 0x%08X\n", data_24aa64);
#endif
/* Determine the type of the FMC250M_4CH board */ /* Determine the type of the FMC250M_4CH board */
#if 0
_smio_fmc250m_4ch_set_type (self, data_24aa64); _smio_fmc250m_4ch_set_type (self, data_24aa64);
#endif
_smio_fmc250m_4ch_set_type (self, 0x0);
/* Now, initialize the FMC250M_4CH with the appropriate structures*/ /* Now, initialize the FMC250M_4CH with the appropriate structures*/
if (self->type == TYPE_FMC250M_4CH_ACTIVE) { if (self->type == TYPE_FMC250M_4CH_ACTIVE) {
...@@ -155,19 +174,19 @@ err_smch_si571_alloc: ...@@ -155,19 +174,19 @@ err_smch_si571_alloc:
} }
err_smch_ad9510_alloc: err_smch_ad9510_alloc:
smch_24aa64_destroy (&self->smch_24aa64); smch_24aa64_destroy (&self->smch_24aa64);
#if 0
err_smch_24aa64_alloc: err_smch_24aa64_alloc:
#endif
if (self->smch_pca9547 != NULL) { if (self->smch_pca9547 != NULL) {
smch_pca9547_destroy (&self->smch_pca9547); smch_pca9547_destroy (&self->smch_pca9547);
} }
#if 0
err_smch_pca9547_alloc: err_smch_pca9547_alloc:
smch_isla216p_destroy (&self->smch_isla216p_adc3); #endif
err_smch_isla216p_adc3: err_smch_isla216p_adc:
smch_isla216p_destroy (&self->smch_isla216p_adc2); for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
err_smch_isla216p_adc2: smch_isla216p_destroy (&self->smch_isla216p_adc[i]);
smch_isla216p_destroy (&self->smch_isla216p_adc1); }
err_smch_isla216p_adc1:
smch_isla216p_destroy (&self->smch_isla216p_adc0);
err_smch_isla216p_adc0:
err_num_fmc250m_4ch_smios: err_num_fmc250m_4ch_smios:
free (self); free (self);
err_self_alloc: err_self_alloc:
...@@ -221,7 +240,8 @@ static smio_err_e _smio_fmc250m_4ch_set_type (smio_fmc250m_4ch_t *self, ...@@ -221,7 +240,8 @@ static smio_err_e _smio_fmc250m_4ch_set_type (smio_fmc250m_4ch_t *self,
DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO,
"[sm_io:fmc250m_4ch_core] Found Undefined FMC250M_4CH board\n"); "[sm_io:fmc250m_4ch_core] Found Undefined FMC250M_4CH board\n");
err = SMIO_ERR_WRONG_PARAM; err = SMIO_ERR_WRONG_PARAM;
type = TYPE_FMC250M_4CH_UNDEF; // type = TYPE_FMC250M_4CH_UNDEF;
type = TYPE_FMC250M_4CH_ACTIVE;
} }
self->type = type; self->type = type;
......
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.h
View file @ 1dd90fe8
...@@ -10,10 +10,7 @@ ...@@ -10,10 +10,7 @@
#define SMIO_AD9510_HANDLER(smio_handler) ((smch_ad9510_t *) smio_handler->smch_ad9510) #define SMIO_AD9510_HANDLER(smio_handler) ((smch_ad9510_t *) smio_handler->smch_ad9510)
#define SMIO_SI57X_HANDLER(smio_handler) ((smch_si57x_t *) smio_handler->smch_si571) #define SMIO_SI57X_HANDLER(smio_handler) ((smch_si57x_t *) smio_handler->smch_si571)
#define SMIO_ISLA216P_HANDLER0(smio_handler) ((smch_isla216p_t *) smio_handler->smch_isla216p_adc0) #define SMIO_ISLA216P_HANDLER(smio_handler, inst) ((smch_isla216p_t *) smio_handler->smch_isla216p_adc[inst])
#define SMIO_ISLA216P_HANDLER1(smio_handler) ((smch_isla216p_t *) smio_handler->smch_isla216p_adc1)
#define SMIO_ISLA216P_HANDLER2(smio_handler) ((smch_isla216p_t *) smio_handler->smch_isla216p_adc2)
#define SMIO_ISLA216P_HANDLER3(smio_handler) ((smch_isla216p_t *) smio_handler->smch_isla216p_adc3)
/* The follosing codes were generated via the following command: /* The follosing codes were generated via the following command:
* > echo FMC250M_4CH_ACTIVE | md5sum | cut -c 1-8 * > echo FMC250M_4CH_ACTIVE | md5sum | cut -c 1-8
...@@ -38,10 +35,7 @@ typedef struct { ...@@ -38,10 +35,7 @@ typedef struct {
#if 0 #if 0
smch_amc7823_t *smch_amc7823; /* AMC7823 chip handler */ smch_amc7823_t *smch_amc7823; /* AMC7823 chip handler */
#endif #endif
smch_isla216p_t *smch_isla216p_adc0; /* ISLA216P 0 chip handler */ smch_isla216p_t *smch_isla216p_adc[NUM_FMC250M_4CH_ISLA216P]; /* ISLA216P chip handlers */
smch_isla216p_t *smch_isla216p_adc1; /* ISLA216P 1 chip handler */
smch_isla216p_t *smch_isla216p_adc2; /* ISLA216P 2 chip handler */
smch_isla216p_t *smch_isla216p_adc3; /* ISLA216P 3 chip handler */
smch_ad9510_t *smch_ad9510; /* AD9510 chip handler */ smch_ad9510_t *smch_ad9510; /* AD9510 chip handler */
smch_si57x_t *smch_si571; /* SI571 chip handler */ smch_si57x_t *smch_si571; /* SI571 chip handler */
smch_24aa64_t *smch_24aa64; /* 24AA64 chip handler */ smch_24aa64_t *smch_24aa64; /* 24AA64 chip handler */
......
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_exp.c
View file @ 1dd90fe8
...@@ -638,7 +638,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa ...@@ -638,7 +638,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa
#define FMC250M_4CH_ISLA216P_FUNC_NAME_HEADER(func_name) \ #define FMC250M_4CH_ISLA216P_FUNC_NAME_HEADER(func_name) \
static int FMC250M_4CH_ISLA216P_FUNC_NAME(func_name) (void *owner, void *args, void *ret) static int FMC250M_4CH_ISLA216P_FUNC_NAME(func_name) (void *owner, void *args, void *ret)
#define FMC250M_4CH_ISLA216P_FUNC_BODY(owner, args, ret, read_func, write_func, \ #define FMC250M_4CH_ISLA216P_FUNC_BODY(owner, args, ret, inst, read_func, write_func, \
error_msg) \ error_msg) \
do { \ do { \
assert (owner); \ assert (owner); \
...@@ -649,10 +649,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa ...@@ -649,10 +649,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa
smio_fmc250m_4ch_t *fmc250m = smio_get_handler (self); \ smio_fmc250m_4ch_t *fmc250m = smio_get_handler (self); \
ASSERT_TEST(fmc250m != NULL, "Could not get SMIO FMC250M handler", \ ASSERT_TEST(fmc250m != NULL, "Could not get SMIO FMC250M handler", \
err_get_fmc250m_handler, -FMC250M_4CH_ERR); \ err_get_fmc250m_handler, -FMC250M_4CH_ERR); \
smch_isla216p_t *smch_isla216p0 = SMIO_ISLA216P_HANDLER0(fmc250m); \ smch_isla216p_t *smch_isla216p = SMIO_ISLA216P_HANDLER(fmc250m, inst); \
smch_isla216p_t *smch_isla216p1 = SMIO_ISLA216P_HANDLER1(fmc250m); \
smch_isla216p_t *smch_isla216p2 = SMIO_ISLA216P_HANDLER2(fmc250m); \
smch_isla216p_t *smch_isla216p3 = SMIO_ISLA216P_HANDLER3(fmc250m); \
uint32_t rw = *(uint32_t *) EXP_MSG_ZMQ_FIRST_ARG(args); \ uint32_t rw = *(uint32_t *) EXP_MSG_ZMQ_FIRST_ARG(args); \
(void) rw; \ (void) rw; \
uint32_t param = *(uint32_t *) EXP_MSG_ZMQ_NEXT_ARG(args); \ uint32_t param = *(uint32_t *) EXP_MSG_ZMQ_NEXT_ARG(args); \
...@@ -672,13 +669,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa ...@@ -672,13 +669,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa
) \ ) \
WHENNOT(ISEMPTY(read_func))( \ WHENNOT(ISEMPTY(read_func))( \
uint32_t value = 0; \ uint32_t value = 0; \
serr = ((smch_isla216p_func_fp) read_func) (smch_isla216p0, \ serr = ((smch_isla216p_func_fp) read_func) (smch_isla216p, \
&value); \
serr |= ((smch_isla216p_func_fp) read_func) (smch_isla216p1, \
&value); \
serr |= ((smch_isla216p_func_fp) read_func) (smch_isla216p2, \
&value); \
serr |= ((smch_isla216p_func_fp) read_func) (smch_isla216p3, \
&value); \ &value); \
if (serr != SMCH_SUCCESS) { \ if (serr != SMCH_SUCCESS) { \
err = -FMC250M_4CH_ERR; \ err = -FMC250M_4CH_ERR; \
...@@ -699,13 +690,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa ...@@ -699,13 +690,7 @@ typedef smch_err_e (*smch_isla216p_func_fp) (smch_isla216p_t *self, uint32_t *pa
return err; \ return err; \
) \ ) \
WHENNOT(ISEMPTY(write_func))( \ WHENNOT(ISEMPTY(write_func))( \
serr = ((smch_isla216p_func_fp) write_func) (smch_isla216p0, \ serr = ((smch_isla216p_func_fp) write_func) (smch_isla216p, \
&param); \
serr |= ((smch_isla216p_func_fp) write_func) (smch_isla216p1, \
&param); \
serr |= ((smch_isla216p_func_fp) write_func) (smch_isla216p2, \
&param); \
serr |= ((smch_isla216p_func_fp) write_func) (smch_isla216p3, \
&param); \ &param); \
if (serr != SMCH_SUCCESS) { \ if (serr != SMCH_SUCCESS) { \
err = -FMC250M_4CH_ERR; \ err = -FMC250M_4CH_ERR; \
...@@ -727,9 +712,27 @@ static smch_err_e smch_isla216p_test_mode_compat (smch_isla216p_t *self, ...@@ -727,9 +712,27 @@ static smch_err_e smch_isla216p_test_mode_compat (smch_isla216p_t *self,
return smch_isla216p_set_test_mode (self, test_mode); return smch_isla216p_set_test_mode (self, test_mode);
} }
FMC250M_4CH_ISLA216P_FUNC_NAME_HEADER(test_mode) FMC250M_4CH_ISLA216P_FUNC_NAME_HEADER(test_mode0)
{
FMC250M_4CH_ISLA216P_FUNC_BODY(owner, args, ret, 0, /* No read function */,
smch_isla216p_test_mode_compat, "Could not set/get ISLA216P test mode");
}
FMC250M_4CH_ISLA216P_FUNC_NAME_HEADER(test_mode1)
{
FMC250M_4CH_ISLA216P_FUNC_BODY(owner, args, ret, 1, /* No read function */,
smch_isla216p_test_mode_compat, "Could not set/get ISLA216P test mode");
}
FMC250M_4CH_ISLA216P_FUNC_NAME_HEADER(test_mode2)
{
FMC250M_4CH_ISLA216P_FUNC_BODY(owner, args, ret, 2, /* No read function */,
smch_isla216p_test_mode_compat, "Could not set/get ISLA216P test mode");
}
FMC250M_4CH_ISLA216P_FUNC_NAME_HEADER(test_mode3)
{ {
FMC250M_4CH_ISLA216P_FUNC_BODY(owner, args, ret, /* No read function */, FMC250M_4CH_ISLA216P_FUNC_BODY(owner, args, ret, 3, /* No read function */,
smch_isla216p_test_mode_compat, "Could not set/get ISLA216P test mode"); smch_isla216p_test_mode_compat, "Could not set/get ISLA216P test mode");
} }
...@@ -786,7 +789,10 @@ const disp_table_func_fp fmc250m_4ch_exp_fp [] = { ...@@ -786,7 +789,10 @@ const disp_table_func_fp fmc250m_4ch_exp_fp [] = {
FMC250M_4CH_SI571_FUNC_NAME(get_defaults), FMC250M_4CH_SI571_FUNC_NAME(get_defaults),
RW_PARAM_FUNC_NAME(fmc250m_4ch, rst_adcs), RW_PARAM_FUNC_NAME(fmc250m_4ch, rst_adcs),
RW_PARAM_FUNC_NAME(fmc250m_4ch, rst_div_adcs), RW_PARAM_FUNC_NAME(fmc250m_4ch, rst_div_adcs),
FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode), FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode0),
FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode1),
FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode2),
FMC250M_4CH_ISLA216P_FUNC_NAME(test_mode3),
NULL NULL
}; };
......
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_exports.c
View file @ 1dd90fe8
...@@ -580,9 +580,45 @@ disp_op_t fmc250m_4ch_si571_get_defaults_exp = { ...@@ -580,9 +580,45 @@ disp_op_t fmc250m_4ch_si571_get_defaults_exp = {
} }
}; };
disp_op_t fmc250m_4ch_test_mode_exp = { disp_op_t fmc250m_4ch_test_mode0_exp = {
.name = FMC250M_4CH_NAME_TESTMODE, .name = FMC250M_4CH_NAME_TESTMODE0,
.opcode = FMC250M_4CH_OPCODE_TESTMODE, .opcode = FMC250M_4CH_OPCODE_TESTMODE0,
.retval = DISP_ARG_END,
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc250m_4ch_test_mode1_exp = {
.name = FMC250M_4CH_NAME_TESTMODE1,
.opcode = FMC250M_4CH_OPCODE_TESTMODE1,
.retval = DISP_ARG_END,
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc250m_4ch_test_mode2_exp = {
.name = FMC250M_4CH_NAME_TESTMODE2,
.opcode = FMC250M_4CH_OPCODE_TESTMODE2,
.retval = DISP_ARG_END,
.retval_owner = DISP_OWNER_OTHER,
.args = {
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_ENCODE(DISP_ATYPE_UINT32, uint32_t),
DISP_ARG_END
}
};
disp_op_t fmc250m_4ch_test_mode3_exp = {
.name = FMC250M_4CH_NAME_TESTMODE3,
.opcode = FMC250M_4CH_OPCODE_TESTMODE3,
.retval = DISP_ARG_END, .retval = DISP_ARG_END,
.retval_owner = DISP_OWNER_OTHER, .retval_owner = DISP_OWNER_OTHER,
.args = { .args = {
...@@ -645,7 +681,10 @@ const disp_op_t *fmc250m_4ch_exp_ops [] = { ...@@ -645,7 +681,10 @@ const disp_op_t *fmc250m_4ch_exp_ops [] = {
&fmc250m_4ch_si571_get_defaults_exp, &fmc250m_4ch_si571_get_defaults_exp,
&fmc250m_4ch_rst_adcs_exp, &fmc250m_4ch_rst_adcs_exp,
&fmc250m_4ch_rst_div_adcs_exp, &fmc250m_4ch_rst_div_adcs_exp,
&fmc250m_4ch_test_mode_exp, &fmc250m_4ch_test_mode0_exp,
&fmc250m_4ch_test_mode1_exp,
&fmc250m_4ch_test_mode2_exp,
&fmc250m_4ch_test_mode3_exp,
NULL NULL
}; };
src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_exports.h
View file @ 1dd90fe8
...@@ -61,7 +61,10 @@ extern disp_op_t fmc250m_4ch_si571_set_freq_exp; ...@@ -61,7 +61,10 @@ extern disp_op_t fmc250m_4ch_si571_set_freq_exp;
extern disp_op_t fmc250m_4ch_si571_get_defaults_exp; extern disp_op_t fmc250m_4ch_si571_get_defaults_exp;
extern disp_op_t fmc250m_4ch_rst_adcs_exp; extern disp_op_t fmc250m_4ch_rst_adcs_exp;
extern disp_op_t fmc250m_4ch_rst_div_adcs_exp; extern disp_op_t fmc250m_4ch_rst_div_adcs_exp;
extern disp_op_t fmc250m_4ch_test_mode_exp; extern disp_op_t fmc250m_4ch_test_mode0_exp;
extern disp_op_t fmc250m_4ch_test_mode1_exp;
extern disp_op_t fmc250m_4ch_test_mode2_exp;
extern disp_op_t fmc250m_4ch_test_mode3_exp;
extern const disp_op_t *fmc250m_4ch_exp_ops []; extern const disp_op_t *fmc250m_4ch_exp_ops [];
......
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