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Beam Positoning Monitor - Gateware
Commit eda588d1 authored by Lucas Russo's avatar Lucas Russo
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README: updated instructions and folder hierarchy

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README
View file @ eda588d1
...@@ -9,39 +9,113 @@ Folder Hierarchy organization: ...@@ -9,39 +9,113 @@ Folder Hierarchy organization:
* *
| |
|-- hdl: |-- hdl:
| | HDL (Verilog/VHDL) cores related to the BPM. | | HDL (Verilog/VHDL) cores related to the BPM.
| | | |
| |-- ip_cores: | |-- ip_cores:
| | | Third party reusable modules, primarily Open hardware | | | Third party reusable modules, primarily Open hardware
| | | modules (http://www.ohwr.org). | | | modules (http://www.ohwr.org).
| | |
| | |-- etherbone-core: | | |-- etherbone-core:
| | | Connects two Wishbone Busses, either a true hardware bus | | | Connects two Wishbone Busses, either a true hardware bus
| | | or emulated software bus, throught Ethernet. | | | or emulated software bus, throught Ethernet.
| | |-- general-cores: | | |-- general-cores (fork from original projecct):
| | General reusable modules. | | General reusable modules.
| |
| |-- modules: | |-- modules:
| | | Modules specific to BPM hardware. | | | Modules specific to BPM hardware.
| | |-- custom_common: | | |
| | | Common (reusable) modules to BPM hardware and possibly | | |-- custom_common:
| | | to other designs. | | | Common (reusable) modules to BPM hardware and possibly
| | |-- custom_wishbone: | | | to other designs.
| | Wishbone modules to BPM hardware. | | |-- custom_wishbone:
| | Wishbone modules to BPM hardware.
| |
| |-- platform: | |-- platform:
| | Platform-specific code, such as xilinx chipscope wrappers. | | Platform-specific code, such as xilinx chipscope wrappers.
| |
| |-- sim: | |-- sim:
| | Generic simulation files, reusable Bus Functional Modules (BFM), | | Generic simulation files, reusable Bus Functional Modules (BFM),
| | constants definitions. | | constants definitions.
| |
| |-- syn: | |-- syn:
| | Synthesis specific files (user constraints files and top design | | Synthesis specific files (user constraints files and top design
| | specification) | | specification).
| |
| |-- testbench: | |-- testbench:
| | Testbenches for modules and top level designs. May use modules | | Testbenches for modules and top level designs. May use modules
| | defined elsewhere (specific within the 'sim" directory) | | defined elsewhere (specific within the 'sim" directory).
| |
| |-- top: | |-- top:
| Top design modules. | Top design modules.
|
|-- sw: |-- sw:
Software related to the BPM. | Software related to interfacing the BPM carrier board with a PC
| via PCIe.
|
|-- embedded-sw (based on the original project by Alessandrio Rubini and others
| | <http://www.ohwr.org/projects/wrpc-sw>):
| | Embedded software that runs inside the LM32 softcore processor.
|
|-- arch:
| Architecture specific code, like linker scripts and boot code.
|
|-- boards:
| Board specific parameters and initialization.
|
|-- dev:
| Device specific code, such as UART, GPIO and DMA interfaces
|
|-- include:
| | General headers, mosly API device headers.
| |
| |-- hw:
| | Device specefic registers and strucutures. This defnitions
| | are included by the more general headers located inside
| | the "include" top directory.
| |
| |-- memmgr:
| Memory pool for "dynamic" alocated memory. Code by
| by Eli Bendersky.
|
|-- lib:
| Utilities and general functions, such as the memmgr subsystem
| and a printf-like function.
|
|-- tests:
| Folder dedicated to software testing.
|
|-- tools:
General tools for generating RAM loadable file by the firmware
FPGA.
==========================================================
Cloning this repository:
This repository makes use of git submodules, located at 'hdl/ip_cores' folder:
hdl/ip_cores/general-cores
hdl/ip_cores/etherbone-core
To clone the whole repository use the following command:
$ git clone --recursive git://github.com/lerwys/bpm-sw.git (read only)
or
$ git clone --recursive git@github.com:lerwys/bpm-sw.git (read+write)
For older versions of Git (<1.6.5), use the following:
$ git clone git://github.com/lerwys/bpm-sw.git
or
$ git clone git@github.com:lerwys/bpm-sw.git
$ git submodule init
$ git submodule update
To update each submodule within this project use:
$ git submodule foreach git rebase origin master
========================================================== ==========================================================
Simulation instructions: Simulation instructions:
...@@ -86,7 +160,7 @@ Synthesis instructions: ...@@ -86,7 +160,7 @@ Synthesis instructions:
2 - make local 2 - make local
-> Load the generated .bit file with iMPACT -> Load the generated .bit file with iMPACT or other tool
3 - impact 3 - impact
========================================================== ==========================================================
...@@ -98,4 +172,5 @@ for memories (ROMs). However, the xilinx initialization file (.mif) ...@@ -98,4 +172,5 @@ for memories (ROMs). However, the xilinx initialization file (.mif)
paths are absolute to a specific machine! You either have to change paths are absolute to a specific machine! You either have to change
the path to match your machine or figure a way to specifies a relative the path to match your machine or figure a way to specifies a relative
path (specifiying only the name of the mif file does not work as the path (specifiying only the name of the mif file does not work as the
simulator is not called within this folder). simulator is not called within this folder). Try a relative path based
on the simulation folder.
hdl/README
View file @ eda588d1
...@@ -27,31 +27,3 @@ Modified hdl-make tool in order to allow simulation with ISim Xilinx Simulator ...@@ -27,31 +27,3 @@ Modified hdl-make tool in order to allow simulation with ISim Xilinx Simulator
hdl-make2: hdl-make2:
https://github.com/lerwys/hdl-make2 https://github.com/lerwys/hdl-make2
===============================================
This repository makes use of git submodules, located at 'ip_cores' folder:
ip_cores/general-cores
ip_cores/etherbone-core
To clone the whole repository use the following command:
$ git clone --recursive git://github.com/lerwys/bpm-sw.git (read only)
or
$ git clone --recursive git@github.com:lerwys/bpm-sw.git (read+write)
For older versions of Git (<1.6.5), use the following:
$ git clone git://github.com/lerwys/bpm-sw.git
or
$ git clone git@github.com:lerwys/bpm-sw.git
$ git submodule init
$ git submodule update
To update each submodule within this project use:
$ git submodule foreach git rebase origin master
===============================================
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