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Beam Positoning Monitor - Gateware
Commit 7ab691e1 authored by Lucas Russo's avatar Lucas Russo
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Merge branch 'emb-sw-devel' into ebone-hw-support

parents 32cd87ec d89858eb
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embedded-sw/Makefile
View file @ 7ab691e1
......@@ -9,8 +9,8 @@ CONFIG_PPRINTF =? 1
#endif
CONFIG_ETHERBONE =? 1
CONFIG_FMC150 ?= 1
CONFIG_FMC516 ?= 1
CONFIG_FMC150 ?= 0
CONFIG_FMC516 ?= 0
# and don't touch the rest unless you know what you're doing.
CROSS_COMPILE ?= lm32-elf-
......@@ -41,7 +41,7 @@ CFLAGS_MEMMGR = -DDEBUG_MEMMGR_FATAL=1 \
-DDEBUG_MEMMGR_SUPPORT_STATS=1 \
-DPOOL_SIZE=2048
CFLAGS_DEBUG = -DDEBUG_PRINT=1 -DFMC150_DEBUG=1
CFLAGS_DEBUG = -DDBE_DBG=1
CFLAGS_PLATFORM = -mmultiply-enabled -mbarrel-shift-enabled
LDFLAGS_PLATFORM = -mmultiply-enabled -mbarrel-shift-enabled \
......
embedded-sw/boards/ml605/board.h
View file @ 7ab691e1
......@@ -14,10 +14,6 @@
/* Ethernet MAC definitions */
// dynamic defined through SDB
//#define ETH0_BASE 0x30015000U //ethmac_devl
//#define ETH0_BUF 0x20000000U //ethmac_buf_devl
#define ETH0_BASE 0x30005000U //ethmac_devl
#define ETH0_BUF 0x20000000U //ethmac_buf_devl
#define ETH0_IRQ 0
//#define ETH0_PHY 0
// Taken from ML605 user manual
......@@ -30,12 +26,6 @@
#define ETH_MACADDR1 0x0a
#define ETH_MACADDR0 0x00
// temporary place for these constants. Testing only!
#define ETH_DEST 0
#define ETH_SOURCE (ETH_DEST+6)
#define ETH_TYPE (ETH_SOURCE+6)
#define ETH_END (ETH_TYPE+2)
/*
* Buffer number (must be 2^n)
*/
......@@ -48,7 +38,7 @@
* Buffer size
*/
//#define BUFF_SIZE (0x600-4)
#define BUFF_SIZE (0x800)
#define BUFF_SIZE (0x600)
#define OETH_RX_BUFF_SIZE BUFF_SIZE
#define OETH_TX_BUFF_SIZE BUFF_SIZE
......
embedded-sw/dbe.vhd
View file @ 7ab691e1
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embedded-sw/dbe_main.c
View file @ 7ab691e1
This diff is collapsed.
embedded-sw/dev/sdb.c
View file @ 7ab691e1
......@@ -9,197 +9,195 @@
#define SDB_EMPTY 0xFF
typedef struct pair64 {
uint32_t high;
uint32_t low;
uint32_t high;
uint32_t low;
} pair64_t;
struct sdb_empty {
int8_t reserved[63];
uint8_t record_type;
int8_t reserved[63];
uint8_t record_type;
};
struct sdb_product {
pair64_t vendor_id;
uint32_t device_id;
uint32_t version;
uint32_t date;
int8_t name[19];
uint8_t record_type;
pair64_t vendor_id;
uint32_t device_id;
uint32_t version;
uint32_t date;
int8_t name[19];
uint8_t record_type;
};
struct sdb_component {
pair64_t addr_first;
pair64_t addr_last;
struct sdb_product product;
pair64_t addr_first;
pair64_t addr_last;
struct sdb_product product;
};
struct sdb_device {
uint16_t abi_class;
uint8_t abi_ver_major;
uint8_t abi_ver_minor;
uint32_t bus_specific;
struct sdb_component sdb_component;
uint16_t abi_class;
uint8_t abi_ver_major;
uint8_t abi_ver_minor;
uint32_t bus_specific;
struct sdb_component sdb_component;
};
struct sdb_bridge {
pair64_t sdb_child;
struct sdb_component sdb_component;
pair64_t sdb_child;
struct sdb_component sdb_component;
};
struct sdb_interconnect {
uint32_t sdb_magic;
uint16_t sdb_records;
uint8_t sdb_version;
uint8_t sdb_bus_type;
struct sdb_component sdb_component;
uint32_t sdb_magic;
uint16_t sdb_records;
uint8_t sdb_version;
uint8_t sdb_bus_type;
struct sdb_component sdb_component;
};
typedef union sdb_record {
struct sdb_empty empty;
struct sdb_device device;
struct sdb_bridge bridge;
struct sdb_interconnect interconnect;
struct sdb_empty empty;
struct sdb_device device;
struct sdb_bridge bridge;
struct sdb_interconnect interconnect;
} sdb_record_t;
static unsigned char *find_device_deep(unsigned int base, unsigned int sdb,
unsigned int devid)
unsigned int devid)
{
sdb_record_t *record = (sdb_record_t *) sdb;
int records = record->interconnect.sdb_records;
int i;
for (i = 0; i < records; ++i, ++record) {
if (record->empty.record_type == SDB_BRIDGE) {
unsigned char *out =
find_device_deep(base +
record->bridge.sdb_component.
addr_first.low,
record->bridge.sdb_child.low,
devid);
if (out)
return out;
}
if (record->empty.record_type == SDB_DEVICE &&
record->device.sdb_component.product.device_id == devid) {
break;
}
}
if (i == records)
return 0;
return (unsigned char *)(base +
record->device.sdb_component.addr_first.low);
sdb_record_t *record = (sdb_record_t *) sdb;
int records = record->interconnect.sdb_records;
int i;
for (i = 0; i < records; ++i, ++record) {
if (record->empty.record_type == SDB_BRIDGE) {
unsigned char *out =
find_device_deep(base +
record->bridge.sdb_component.
addr_first.low,
record->bridge.sdb_child.low,
devid);
if (out)
return out;
}
if (record->empty.record_type == SDB_DEVICE &&
record->device.sdb_component.product.device_id == devid) {
break;
}
}
if (i == records)
return 0;
return (unsigned char *)(base +
record->device.sdb_component.addr_first.low);
}
static void find_device_deep_all_rec(struct dev_node **dev, unsigned int *size,
unsigned int base, unsigned int sdb, unsigned int devid)
unsigned int base, unsigned int sdb, unsigned int devid)
{
sdb_record_t *record = (sdb_record_t *) sdb;
int records = record->interconnect.sdb_records;
int i;
for (i = 0; i < records; ++i, ++record) {
if (record->empty.record_type == SDB_BRIDGE) {
find_device_deep_all_rec(dev, size, base +
record->bridge.sdb_component.addr_first.low,
record->bridge.sdb_child.low,
devid);
}
if (record->empty.record_type == SDB_DEVICE &&
record->device.sdb_component.product.device_id == devid) {
// Alloc new node device
*dev = (struct dev_node *)memmgr_alloc(sizeof(struct dev_node));
(*dev)->base = (unsigned char *)(base +
record->device.sdb_component.addr_first.low);
// Ensure a null pointer on end of list
(*dev)->next = 0;
// Pass new node address
dev = &(*dev)->next;
(*size)++;
}
}
sdb_record_t *record = (sdb_record_t *) sdb;
int records = record->interconnect.sdb_records;
int i;
for (i = 0; i < records; ++i, ++record) {
if (record->empty.record_type == SDB_BRIDGE) {
find_device_deep_all_rec(dev, size, base +
record->bridge.sdb_component.addr_first.low,
record->bridge.sdb_child.low,
devid);
}
if (record->empty.record_type == SDB_DEVICE &&
record->device.sdb_component.product.device_id == devid) {
// Alloc new node device
*dev = (struct dev_node *)memmgr_alloc(sizeof(struct dev_node));
(*dev)->base = (unsigned char *)(base +
record->device.sdb_component.addr_first.low);
// Ensure a null pointer on end of list
(*dev)->next = 0;
// Pass new node address
dev = &(*dev)->next;
(*size)++;
}
}
}
static struct dev_list *find_device_deep_all(unsigned int base, unsigned int sdb,
unsigned int devid)
unsigned int devid)
{
// Device structure list
struct dev_list *dev = (struct dev_list *)memmgr_alloc(sizeof(struct dev_list));
// Device structure list
struct dev_list *dev = (struct dev_list *)memmgr_alloc(sizeof(struct dev_list));
// Initialize structure
dev->devid = devid;
dev->size = 0;
dev->devices = 0;
// Initialize structure
dev->devid = devid;
dev->size = 0;
dev->devices = 0;
// Fill device list with the appropriate nodes
find_device_deep_all_rec(&(dev->devices), &(dev->size), base, sdb, devid);
// Fill device list with the appropriate nodes
find_device_deep_all_rec(&(dev->devices), &(dev->size), base, sdb, devid);
return dev;
return dev;
}
static void print_devices_deep(unsigned int base, unsigned int sdb)
{
sdb_record_t *record = (sdb_record_t *) sdb;
int records = record->interconnect.sdb_records;
int i;
char buf[20];
for (i = 0; i < records; ++i, ++record) {
if (record->empty.record_type == SDB_BRIDGE)
print_devices_deep(base +
record->bridge.sdb_component.
addr_first.low,
record->bridge.sdb_child.low);
if (record->empty.record_type != SDB_DEVICE)
continue;
memcpy(buf, record->device.sdb_component.product.name, 19);
buf[19] = 0;
pp_printf("%8x:%8x 0x%8x %s\n",
record->device.sdb_component.product.vendor_id.low,
record->device.sdb_component.product.device_id,
base + record->device.sdb_component.addr_first.low,
buf);
}
sdb_record_t *record = (sdb_record_t *) sdb;
int records = record->interconnect.sdb_records;
int i;
char buf[20];
for (i = 0; i < records; ++i, ++record) {
if (record->empty.record_type == SDB_BRIDGE)
print_devices_deep(base +
record->bridge.sdb_component.
addr_first.low,
record->bridge.sdb_child.low);
if (record->empty.record_type != SDB_DEVICE)
continue;
memcpy(buf, record->device.sdb_component.product.name, 19);
buf[19] = 0;
pp_printf("%8x:%8x 0x%8x %s\n",
record->device.sdb_component.product.vendor_id.low,
record->device.sdb_component.product.device_id,
base + record->device.sdb_component.addr_first.low,
buf);
}
}
static unsigned char *find_device(unsigned int devid)
{
return find_device_deep(0, SDB_ADDRESS, devid);
return find_device_deep(0, SDB_ADDRESS, devid);
}
static struct dev_list *find_device_all(unsigned int devid)
{
return find_device_deep_all(0, SDB_ADDRESS, devid);
return find_device_deep_all(0, SDB_ADDRESS, devid);
}
void sdb_print_devices(void)
{
pp_printf("-------------------------------------------\n");
pp_printf("| SDB memory map |\n");
pp_printf("-------------------------------------------\n\n");
print_devices_deep(0, SDB_ADDRESS);
pp_printf("-------------------------------------------\n");
pp_printf("| SDB memory map |\n");
pp_printf("-------------------------------------------\n\n");
print_devices_deep(0, SDB_ADDRESS);
}
void sdb_find_devices(void)
{
// Enumerate devices
// get the second device form this list. Just for testing! with the etherbone
// core
mem_devl = find_device_all(0x66cfeb52);
dma_devl = find_device_all(0xcababa56);
ethmac_devl = find_device_all(0xf8cfeb16);
ethmac_adapt_devl = find_device_all(0x2ff9a28e);
ebone_cfg_devl = find_device_all(0x68202b22);
fmc516_devl = find_device_all(0x27b95341);
spi_devl = find_device_all(0x40286417);
i2c_devl = find_device_all(0x97b6323d);
owr_devl = find_device_all(0x525fbb09);
uart_devl = find_device_all(0x8a5719ae);
gpio_devl = find_device_all(0x35aa6b95);
tics_devl = find_device_all(0xfdafb9dd);
// Enumerate devices
mem_devl = find_device_all(0x66cfeb52);
dma_devl = find_device_all(0xcababa56);
ethmac_devl = find_device_all(0xf8cfeb16);
ethmac_adapt_devl = find_device_all(0x2ff9a28e);
ebone_cfg_devl = find_device_all(0x68202b22);
fmc516_devl = find_device_all(0x27b95341);
spi_devl = find_device_all(0x40286417);
i2c_devl = find_device_all(0x97b6323d);
owr_devl = find_device_all(0x525fbb09);
uart_devl = find_device_all(0x8a5719ae);
gpio_devl = find_device_all(0x35aa6b95);
tics_devl = find_device_all(0xfdafb9dd);
}
embedded-sw/fmc/fmc.mk
View file @ 7ab691e1
ifdef CONFIG_FMC150
ifeq ($(CONFIG_FMC150),1)
OBJS_FMC150 += fmc/fmc150/fmc150.o
endif
ifdef CONFIG_FMC516
OBJS_FMC516 += fmc/fmc516/lmk02000.o fmc/fmc516/isla216p25.o fmc/fmc516/fmc516.o
ifeq ($(CONFIG_FMC516),1)
OBJS_FMC516 += fmc/fmc516/lmk02000.o fmc/fmc516/isla216p25.o fmc/fmc516/fmc516.o
endif
OBJS_FMC += $(OBJS_FMC150) $(OBJS_FMC516)
......
embedded-sw/include/debug_subsys.h 0 → 100644
View file @ 7ab691e1
/*
* Copyright (C) 2013 LNLS (www.lnls.br)
* Author: Lucas Russo <lucas.russo@lnls.br>
*
* Released according to the GNU GPL, version 2 or any later version.
*/
#ifndef _DEBUG_SUBSYS_
#define _DEBUG_SUBSYS_
#define DBG_GENERIC (0x1 << 4)
#define DBG_GPIO (0x2 << 4)
#define DBG_SPI (0x4 << 4)
#define DBG_I2C (0x8 << 4)
#define DBG_OWR (0x10 << 4)
#define DBG_ETH (0x20 << 4)
#define DBG_SUBSYS_ON (DBG_GENERIC | DBG_GPIO | DBG_SPI | DBG_I2C | DBG_OWR | DBG_ETH)
#endif
embedded-sw/lib/arp.h
View file @ 7ab691e1
#ifndef _ARP_H_
#define _ARP_H_
#define ARP_HTYPE 0
#define ARP_PTYPE (ARP_HTYPE+2)
#define ARP_HLEN (ARP_PTYPE+2)
#define ARP_PLEN (ARP_HLEN+1)
#define ARP_OPER (ARP_PLEN+1)
#define ARP_SHA (ARP_OPER+2)
#define ARP_SPA (ARP_SHA+6)
#define ARP_THA (ARP_SPA+4)
#define ARP_TPA (ARP_THA+6)
#define ARP_END (ARP_TPA+4)
#include "proto.h"
extern volatile int sawARP;
......
embedded-sw/lib/debug_print.h
View file @ 7ab691e1
......@@ -10,15 +10,29 @@
#include <stdarg.h>
#include "pp-printf.h"
#include "debug_subsys.h"
void debug_print(const char *fmt, ...);
//__attribute__((format(printf,1,2)));
/* temporary */
#define DBG_MIN_LEVEL DBE_DBG_INFO
/* Debug levels */
#define DBE_DBG_TRACE (0x1 << 1)
#define DBE_DBG_INFO (0x2 << 1)
#define DBE_DBG_WARN (0x3 << 1)
#define DBE_DBG_ERR (0x4 << 1)
#define DBE_DBG_FATAL (0x5 << 1)
#define DBE_DBG_MASK (0xF << 1)
/* Debug halt */
#define DBE_DBG_HALT (0x1)
void debug_print(const char *fmt, ...);
void debug_print2(const char *fmt, const char *data, int len);
#ifdef DEBUG_PRINT
#ifdef DBE_DBG
#define dbg_print(fmt, ...) \
pp_printf("%s: %s (%d): "fmt, __FILE__, __FUNCTION__, __LINE__, ##__VA_ARGS__)
pp_printf("%s (%d): "fmt, __FUNCTION__, __LINE__, ##__VA_ARGS__)
#define dbg_print2(fmt, data, len) \
debug_print2(fmt, data, len)
#else
......@@ -26,4 +40,21 @@ void debug_print2(const char *fmt, const char *data, int len);
#define dbg_print2(fmt, data, len)
#endif
/* dbg has the following format:
* 31 - 4 3 - 1 0-0
* DBG_SUBSYS DBG_LVL DBG_HALT
*/
#ifdef DBE_DBG
#define DBE_DEBUG(dbg, fmt, ...) do { if (((dbg) & DBG_SUBSYS_ON) && (((dbg) & DBE_DBG_MASK) >= DBG_MIN_LEVEL)) { dbg_print(fmt, ##__VA_ARGS__); if ((dbg) & DBE_DBG_HALT) while(1); } } while(0)
#define DBE_DEBUG_ARRAY(dbg, fmt, ...) do { if (((dbg) & DBG_SUBSYS_ON) && (((dbg) & DBE_DBG_MASK) >= DBG_MIN_LEVEL)) { dbg_print2(fmt, ##__VA_ARGS__); if ((dbg) & DBE_DBG_HALT) while(1); } } while(0)
#define DBE_ERR(...) do { dbg_print(fmt, ##__VA_ARGS__); } while(0)
#else /* DBE_DEBUG */
#define DBE_DEBUG(dbg, fmt, ...)
#define DBE_DEBUG_ARRAY(dbg, fmt, ...)
#define DBE_ERR(...)
#endif
#endif
embedded-sw/lib/ethmac/ethmac.c
View file @ 7ab691e1
This diff is collapsed.
embedded-sw/lib/ethmac/ethmac.h
View file @ 7ab691e1
......@@ -45,44 +45,53 @@ typedef unsigned int uint;
/* Ethernet configuration registers */
typedef struct _oeth_regs {
uint moder; /* Mode Register */
uint int_src; /* Interrupt Source Register */
uint int_mask; /* Interrupt Mask Register */
uint ipgt; /* Back to Bak Inter Packet Gap Register */
uint ipgr1; /* Non Back to Back Inter Packet Gap Register 1 */
uint ipgr2; /* Non Back to Back Inter Packet Gap Register 2 */
uint packet_len; /* Packet Length Register (min. and max.) */
uint collconf; /* Collision and Retry Configuration Register */
uint tx_bd_num; /* Transmit Buffer Descriptor Number Register */
uint ctrlmoder; /* Control Module Mode Register */
uint miimoder; /* MII Mode Register */
uint miicommand; /* MII Command Register */
uint miiaddress; /* MII Address Register */
uint miitx_data; /* MII Transmit Data Register */
uint miirx_data; /* MII Receive Data Register */
uint miistatus; /* MII Status Register */
uint mac_addr0; /* MAC Individual Address Register 0 */
uint mac_addr1; /* MAC Individual Address Register 1 */
uint hash_addr0; /* Hash Register 0 */
uint hash_addr1; /* Hash Register 1 */
uint moder; /* Mode Register */
uint int_src; /* Interrupt Source Register */
uint int_mask; /* Interrupt Mask Register */
uint ipgt; /* Back to Bak Inter Packet Gap Register */
uint ipgr1; /* Non Back to Back Inter Packet Gap Register 1 */
uint ipgr2; /* Non Back to Back Inter Packet Gap Register 2 */
uint packet_len; /* Packet Length Register (min. and max.) */
uint collconf; /* Collision and Retry Configuration Register */
uint tx_bd_num; /* Transmit Buffer Descriptor Number Register */
uint ctrlmoder; /* Control Module Mode Register */
uint miimoder; /* MII Mode Register */
uint miicommand; /* MII Command Register */
uint miiaddress; /* MII Address Register */
uint miitx_data; /* MII Transmit Data Register */
uint miirx_data; /* MII Receive Data Register */
uint miistatus; /* MII Status Register */
uint mac_addr0; /* MAC Individual Address Register 0 */
uint mac_addr1; /* MAC Individual Address Register 1 */
uint hash_addr0; /* Hash Register 0 */
uint hash_addr1; /* Hash Register 1 */
} oeth_regs;
/* Ethernet buffer descriptor */
typedef struct _oeth_bd {
#if 0
ushort len; /* Buffer length */
ushort status; /* Buffer status */
ushort len; /* Buffer length */
ushort status; /* Buffer status */
#else
uint len_status;
uint len_status;
#endif
uint addr; /* Buffer address */
uint addr; /* Buffer address */
} oeth_bd;
typedef volatile oeth_regs ethmac_t;
typedef volatile oeth_bd ethmac_bd_t;
typedef volatile unsigned long ethmac_buf_t;
//Just one device supported
#define OETH_ID 0
#define OETH_BUF_ID 0
// From board.h
#define ETH_BASE_ADD ETH0_BASE
//#define ETH_BASE_ADD ETH0_BASE
#define OETH_REG_BASE ETH_BASE_ADD
#define OETH_BD_BASE (ETH_BASE_ADD + 0x400)
//#define OETH_REG_BASE ETH_BASE_ADD
//#define OETH_BD_BASE (ETH_BASE_ADD + 0x400)
#define OETH_BD_BASE_OFFS 0x400
#define OETH_TOTAL_BD 128
#define OETH_MAXBUF_LEN 0x600
......@@ -100,11 +109,11 @@ typedef struct _oeth_bd {
#define OETH_TX_BD_DEFER 0x0002 /* Tx BD Defer Status */
#define OETH_TX_BD_CARRIER 0x0001 /* Tx BD Carrier Sense Lost Status */
#define OETH_TX_BD_STATS (OETH_TX_BD_UNDERRUN | \
OETH_TX_BD_RETRY | \
OETH_TX_BD_RETLIM | \
OETH_TX_BD_LATECOL | \
OETH_TX_BD_DEFER | \
OETH_TX_BD_CARRIER)
OETH_TX_BD_RETRY | \
OETH_TX_BD_RETLIM | \
OETH_TX_BD_LATECOL | \
OETH_TX_BD_DEFER | \
OETH_TX_BD_CARRIER)
/* Rx BD */
#define OETH_RX_BD_EMPTY 0x8000 /* Rx BD Empty */
......@@ -120,13 +129,13 @@ typedef struct _oeth_bd {
#define OETH_RX_BD_CRCERR 0x0002 /* Rx BD CRC Error Status */
#define OETH_RX_BD_LATECOL 0x0001 /* Rx BD Late Collision Status */
#define OETH_RX_BD_STATS (OETH_RX_BD_MISS | \
OETH_RX_BD_OVERRUN | \
OETH_RX_BD_INVSIMB | \
OETH_RX_BD_DRIBBLE | \
OETH_RX_BD_TOOLONG | \
OETH_RX_BD_SHORT | \
OETH_RX_BD_CRCERR | \
OETH_RX_BD_LATECOL)
OETH_RX_BD_OVERRUN | \
OETH_RX_BD_INVSIMB | \
OETH_RX_BD_DRIBBLE | \
OETH_RX_BD_TOOLONG | \
OETH_RX_BD_SHORT | \
OETH_RX_BD_CRCERR | \
OETH_RX_BD_LATECOL)
/* MODER Register */
#define OETH_MODER_RXEN 0x00000001 /* Receive Enable */
......@@ -191,7 +200,8 @@ typedef struct _oeth_bd {
void eth_mii_write(char phynum, short regnum, short data);
short eth_mii_read(char phynum, short regnum);
void ethmac_setup(int phynum, unsigned int buf);
//void ethmac_setup(int phynum, unsigned int buf);
void ethmac_setup(int phynum);
void ethmac_halt(void);
void oeth_interrupt(void* arg);
void tx_packet(void* data, int length);
......@@ -199,6 +209,6 @@ void tx_packet(void* data, int length);
void user_recv(unsigned char* data, int length);
/* ETHMAC init */
//int ethmac_init(void);
int ethmac_init(void);
#endif
embedded-sw/lib/ethmac/ethmac.mk
View file @ 7ab691e1
OBJS_LIB += lib/ethmac/ethmac.o lib/ethmac/ethmac-int.o
OBJS_LIB += lib/ethmac/ethmac.o
#lib/ethmac/ethmac-int.o
embedded-sw/lib/icmp.h
View file @ 7ab691e1
#ifndef _ICMP_H_
#define _ICMP_H_
#include "ipv4.h"
#define ICMP_TYPE (IP_END)
#define ICMP_CODE (ICMP_TYPE+1)
#define ICMP_CHECKSUM (ICMP_CODE+1)
// compatibility with test code
#define ICMP_QUENCH (ICMP_CHECKSUM+2)
#define ICMP_END (ICMP_CHECKSUM+2)
#include "proto.h"
extern volatile int sawPING;
extern volatile int hisBodyLen;
......
embedded-sw/lib/int.c
View file @ 7ab691e1
......@@ -4,65 +4,65 @@
static struct ihnd handlers[MAX_INT_HANDLERS];
static void set_mask(unsigned int mask) {
asm volatile ("wcsr IM, %0" : : "r" (mask));
asm volatile ("wcsr IM, %0" : : "r" (mask));
}
static unsigned int get_mask(void) {
unsigned int mask;
asm volatile ("rcsr %0, IM" : "=r" (mask));
return mask;
unsigned int mask;
asm volatile ("rcsr %0, IM" : "=r" (mask));
return mask;
}
static unsigned int get_pending(void) {
unsigned int mask;
asm volatile ("rcsr %0, IP" : "=r" (mask));
return mask;
unsigned int mask;
asm volatile ("rcsr %0, IP" : "=r" (mask));
return mask;
}
static void clear_pending(void) {
unsigned int one = 0xffffffff;
asm volatile ("wcsr IP, %0" : : "r" (one));
unsigned int one = 0xffffffff;
asm volatile ("wcsr IP, %0" : : "r" (one));
}
//void MicoISRHandler(void) {
void _irq_entry(void){
unsigned int work = get_pending();
clear_pending();
unsigned int work = get_pending();
clear_pending();
/* flush cache */
unsigned int one = 1;
asm volatile ("wcsr DCC, %0" : : "r" (one));
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
/* flush cache */
unsigned int one = 1;
asm volatile ("wcsr DCC, %0" : : "r" (one));
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
int i;
for (i = 0; i < MAX_INT_HANDLERS; ++i)
if ((work & (1 << i)) != 0 && handlers[i].handler)
(*handlers[i].handler)(handlers[i].arg);
int i;
for (i = 0; i < MAX_INT_HANDLERS; ++i)
if ((work & (1 << i)) != 0 && handlers[i].handler)
(*handlers[i].handler)(handlers[i].arg);
}
int int_init(void) {
int i;
unsigned int on = 1;
int i;
unsigned int on = 1;
for (i = 0; i < MAX_INT_HANDLERS; ++i) {
handlers[i].handler = 0;
handlers[i].arg = 0;
}
for (i = 0; i < MAX_INT_HANDLERS; ++i) {
handlers[i].handler = 0;
handlers[i].arg = 0;
}
set_mask(0);
set_mask(0);
/* Enable interrupts: */
//enable_irq();
asm volatile ("wcsr IE, %0" : : "r" (on));
return 0;
/* Enable interrupts: */
//enable_irq();
asm volatile ("wcsr IE, %0" : : "r" (on));
return 0;
}
int int_add(unsigned long i, void (*handler)(void*), void* arg) {
handlers[i].handler = handler;
handlers[i].arg = arg;
set_mask(get_mask() | (0x1 << i));
return 0;
handlers[i].handler = handler;
handlers[i].arg = arg;
set_mask(get_mask() | (0x1 << i));
return 0;
}
embedded-sw/lib/ipv4.c
View file @ 7ab691e1
......@@ -8,7 +8,7 @@
//int needIP = 1;
//static uint8_t myIP[4];
unsigned char myIP[] = { 10, 0, 18, 136 };
unsigned char myIP[] = { 10, 0, 18, 148 };
unsigned char myMAC[] = { ETH_MACADDR0, ETH_MACADDR1, ETH_MACADDR2, ETH_MACADDR3, ETH_MACADDR4, ETH_MACADDR5 };
unsigned char allMAC[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
unsigned char hisIP[4];
......@@ -16,17 +16,17 @@ unsigned char hisMAC[6];
unsigned int ipv4_checksum(unsigned short *buf, int shorts)
{
int i;
unsigned int sum;
int i;
unsigned int sum;
sum = 0;
for (i = 0; i < shorts; ++i)
sum += buf[i];
sum = 0;
for (i = 0; i < shorts; ++i)
sum += buf[i];
sum = (sum >> 16) + (sum & 0xffff);
sum += (sum >> 16);
sum = (sum >> 16) + (sum & 0xffff);
sum += (sum >> 16);
return (~sum & 0xffff);
return (~sum & 0xffff);
}
//static int bootp_retry = 0;
......
embedded-sw/lib/ipv4.h
View file @ 7ab691e1
#ifndef _IPV4_H_
#define _IPV4_H_
#define IP_VERSION 0
#define IP_TOS (IP_VERSION+1)
#define IP_LEN (IP_TOS+1)
#define IP_ID (IP_LEN+2)
#define IP_FLAGS (IP_ID+2)
#define IP_TTL (IP_FLAGS+2)
#define IP_PROTOCOL (IP_TTL+1)
#define IP_CHECKSUM (IP_PROTOCOL+1)
#define IP_SOURCE (IP_CHECKSUM+2)
#define IP_DEST (IP_SOURCE+4)
#define IP_END (IP_DEST+4)
#include "proto.h"
extern unsigned char myIP[];
extern unsigned char myMAC[];
......@@ -28,7 +18,7 @@ unsigned int ipv4_checksum(unsigned short *buf, int shorts);
//void arp_init(const char *if_name);
//void arp_poll(void);
extern int needIP;
//extern int needIP;
void setIP(unsigned char *IP);
void getIP(unsigned char *IP);
......
embedded-sw/lib/lib.mk
View file @ 7ab691e1
......@@ -6,6 +6,7 @@ ifeq ($(CONFIG_PPRINTF),0)
endif
OBJS_LIB += lib/util.o lib/int.o lib/arp.o lib/icmp.o lib/ipv4.o lib/debug_print.o
#OBJS_LIB += lib/util.o lib/int.o lib/debug_print.o
ifdef CONFIG_ETHERBONE
#OBJS_LIB += lib/bootp.o
......
embedded-sw/lib/proto.h 0 → 100644
View file @ 7ab691e1
#ifndef _PROTO_H_
#define _PROTO_H_
/* ETHERNET protocol */
#define ETH_DEST 0
#define ETH_SOURCE (ETH_DEST+6)
#define ETH_TYPE (ETH_SOURCE+6)
#define ETH_END (ETH_TYPE+2)
/* IP protocol */
#define IP_VERSION (ETH_END)
#define IP_TOS (IP_VERSION+1)
#define IP_LEN (IP_TOS+1)
#define IP_ID (IP_LEN+2)
#define IP_FLAGS (IP_ID+2)
#define IP_TTL (IP_FLAGS+2)
#define IP_PROTOCOL (IP_TTL+1)
#define IP_CHECKSUM (IP_PROTOCOL+1)
#define IP_SOURCE (IP_CHECKSUM+2)
#define IP_DEST (IP_SOURCE+4)
#define IP_END (IP_DEST+4)
/* ARP protocol */
#define ARP_HTYPE (ETH_END)
#define ARP_PTYPE (ARP_HTYPE+2)
#define ARP_HLEN (ARP_PTYPE+2)
#define ARP_PLEN (ARP_HLEN+1)
#define ARP_OPER (ARP_PLEN+1)
#define ARP_SHA (ARP_OPER+2)
#define ARP_SPA (ARP_SHA+6)
#define ARP_THA (ARP_SPA+4)
#define ARP_TPA (ARP_THA+6)
#define ARP_END (ARP_TPA+4)
/* ICMP protocol */
#define ICMP_TYPE (IP_END)
#define ICMP_CODE (ICMP_TYPE+1)
#define ICMP_CHECKSUM (ICMP_CODE+1)
/* compatibility with test code */
#define ICMP_QUENCH (ICMP_CHECKSUM+2)
#define ICMP_END (ICMP_CHECKSUM+2)
void sendARP(void);
#endif
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