testbench/*/wb_acq_core_test/**: compile AXI interconnect as we use it now

1a226e5d · Lucas Russo · e92e148b · 1a226e5d
Commit 1a226e5d authored Jan 05, 2016 by Lucas Russo
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questa_compile.sh ...cq_core_test/verilog/artix7/full_tb_mux/questa_compile.sh +2 -1

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--- a/hdl/testbench/wishbone/wb_acq_core_test/verilog/artix7/full_tb_mux/questa_compile.sh
+++ b/hdl/testbench/wishbone/wb_acq_core_test/verilog/artix7/full_tb_mux/questa_compile.sh
@@ -180,7 +180,8 @@ vlog -64 -work axi_interconnect_v1_7 \
 "../../../../../../platform/artix7/afc_v3/axi_interconnect_bpm/axi_interconnect_v1_7/hdl/verilog/axi_interconnect_v1_7_w_upsizer.v"

 vlog -64 -work xil_defaultlib \
-"../../../../../../platform/artix7/afc_v3/axi_interconnect_bpm/sim/axi_interconnect_bpm.v"
+"../../../../../../platform/artix7/afc_v3/axi_interconnect_bpm/sim/axi_interconnect_bpm.v" \
+"../../../../../../platform/artix7/afc_v3/axi_interconnect/sim/axi_interconnect.v"

 vcom -64 -93 -work lib_pkg_v1_0  \
 "../../../../../../platform/artix7/afc_v3/axi_datamover_bpm/lib_pkg_v1_0/hdl/src/vhdl/lib_pkg.vhd"