Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
A
Artix Trivial FMC Carrier ATFC
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Artix Trivial FMC Carrier ATFC
Repository
7e7b30a14d8a615124d2e574f33ddfdee78bf5c7
Switch branch/tag
atfc
hardware
altium
Project Logs for atfc
FPGA_Banks1 SCH ECO 2-2-2017 10-48-26...
Find file
Blame
History
Permalink
Schematic almost complete.
· 7e7b30a1
Samer Kilani
authored
Feb 02, 2017
To do: Assign IO pins
7e7b30a1
FPGA_Banks1 SCH ECO 2-2-2017 10-48-26 AM.LOG
195 Bytes
Edit
Web IDE
Replace FPGA_Banks1 SCH ECO 2-2-2017 10-48-26 AM.LOG
×
Attach a file by drag & drop or
click to upload
Commit message
Replace FPGA_Banks1 SCH ECO 2-2-2017 10-48-26 AM.LOG
Replace file
Cancel
A new branch will be created in your fork and a new merge request will be started.
