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Absolute Encoder VHDL core
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Absolute Encoder VHDL core
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a771e914
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a771e914
authored
Feb 22, 2016
by
Fabien Le Mentec
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update: HSSL reader refs
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f03ada91
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absenc_reader_hssl.vhd
src/absenc_reader_hssl.vhd
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src/absenc_reader_hssl.vhd
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a771e914
--
-- HSSL reader implementation
-- HSSL reader implementation (Attocube ID3010 interferometer)
-- IDS_Manual_v2.0.0.pdf, page 20
-- sampling is done on the falling edge
-- state is updated on the rising edge
-- data sent MSb first, encoded using 2's complement
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