Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
V
VME64x core - msaccani
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
1
Merge Requests
1
Wiki
Wiki
Snippets
Snippets
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Mathieu Saccani
VME64x core - msaccani
Commits
61d6769b
Commit
61d6769b
authored
Dec 07, 2020
by
Mathieu Saccani
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Remove the glitch observed on dtack in MBLT mode (seen on Dab64x at 40MHz with MEN-A20).
parent
def8d371
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
8 additions
and
0 deletions
+8
-0
vme_bus.vhd
hdl/rtl/vme_bus.vhd
+8
-0
No files found.
hdl/rtl/vme_bus.vhd
View file @
61d6769b
...
...
@@ -708,9 +708,17 @@ begin
-- Keep same direction for data and address.
s_mainFSMstate
<=
WAIT_FOR_DS
;
-- Early drive for MBLT.
vme_dtack_async_ctrl
<=
'0'
;
end
if
;
else
s_mainFSMstate
<=
DTACK_LOW
;
-- Early drive for MBLT.
if
s_irq_sel
=
'0'
and
g_VME32
and
s_transferType
=
MBLT
then
vme_dtack_async_ctrl
<=
'0'
;
end
if
;
end
if
;
when
APHASE_2
=>
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment