Commit 61d6769b authored by Mathieu Saccani's avatar Mathieu Saccani

Remove the glitch observed on dtack in MBLT mode (seen on Dab64x at 40MHz with MEN-A20).

parent def8d371
......@@ -708,9 +708,17 @@ begin
-- Keep same direction for data and address.
s_mainFSMstate <= WAIT_FOR_DS;
-- Early drive for MBLT.
vme_dtack_async_ctrl <= '0';
end if;
else
s_mainFSMstate <= DTACK_LOW;
-- Early drive for MBLT.
if s_irq_sel='0' and g_VME32 and s_transferType = MBLT then
vme_dtack_async_ctrl <= '0';
end if;
end if;
when APHASE_2 =>
......
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