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34bc9dc8
Commit
34bc9dc8
authored
Oct 25, 2011
by
Matthieu Cattin
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Fix bug in fmc_adc class, TRIG and ACQ LEDs control.
parent
7b5a4770
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1 changed file
with
6 additions
and
4 deletions
+6
-4
fmc_adc.py
test/fmcadc100m14b4cha/python/fmc_adc.py
+6
-4
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test/fmcadc100m14b4cha/python/fmc_adc.py
View file @
34bc9dc8
...
@@ -153,9 +153,10 @@ class CFmcAdc100Ms:
...
@@ -153,9 +153,10 @@ class CFmcAdc100Ms:
reg
=
self
.
fmc_adc_csr
.
rd_reg
(
self
.
R_CTL
)
reg
=
self
.
fmc_adc_csr
.
rd_reg
(
self
.
R_CTL
)
#print("R_CTL:%.8X")%reg
#print("R_CTL:%.8X")%reg
if
(
state
==
0
):
if
(
state
==
0
):
reg
&=
(
~
(
1
<<
self
.
CTL_ACQ_LED
)
&
self
.
CTL_MASK
)
reg
&=
~
(
1
<<
self
.
CTL_ACQ_LED
)
else
:
else
:
reg
|=
((
1
<<
self
.
CTL_ACQ_LED
)
&
self
.
CTL_MASK
)
reg
|=
(
1
<<
self
.
CTL_ACQ_LED
)
reg
&=
self
.
CTL_MASK
#print("R_CTL:%.8X")%reg
#print("R_CTL:%.8X")%reg
self
.
fmc_adc_csr
.
wr_reg
(
self
.
R_CTL
,
reg
)
self
.
fmc_adc_csr
.
wr_reg
(
self
.
R_CTL
,
reg
)
...
@@ -163,9 +164,10 @@ class CFmcAdc100Ms:
...
@@ -163,9 +164,10 @@ class CFmcAdc100Ms:
reg
=
self
.
fmc_adc_csr
.
rd_reg
(
self
.
R_CTL
)
reg
=
self
.
fmc_adc_csr
.
rd_reg
(
self
.
R_CTL
)
#print("R_CTL:%.8X")%reg
#print("R_CTL:%.8X")%reg
if
(
state
==
0
):
if
(
state
==
0
):
reg
&=
(
~
(
1
<<
self
.
CTL_TRIG_LED
)
&
self
.
CTL_MASK
)
reg
&=
~
(
1
<<
self
.
CTL_TRIG_LED
)
else
:
else
:
reg
|=
((
1
<<
self
.
CTL_TRIG_LED
)
&
self
.
CTL_MASK
)
reg
|=
(
1
<<
self
.
CTL_TRIG_LED
)
reg
&=
self
.
CTL_MASK
#print("R_CTL:%.8X")%reg
#print("R_CTL:%.8X")%reg
self
.
fmc_adc_csr
.
wr_reg
(
self
.
R_CTL
,
reg
)
self
.
fmc_adc_csr
.
wr_reg
(
self
.
R_CTL
,
reg
)
...
...
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