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349304b3
Commit
349304b3
authored
Feb 03, 2012
by
Matthieu Cattin
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Frequency response based on a range instead of a list.
parent
2c3d62e4
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1 changed file
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61 additions
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122 deletions
+61
-122
test16.py
test/fmcadc100m14b4cha/python/test16.py
+61
-122
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test/fmcadc100m14b4cha/python/test16.py
View file @
349304b3
...
...
@@ -15,9 +15,10 @@ from pylab import *
from
ptsexcept
import
*
import
gn4124
import
spec_fmc_adc
import
fmc_adc
import
calibr_box
import
find_usb_tty
from
PAGE.Agilent33250A
import
*
from
PAGE.SineWaveform
import
*
...
...
@@ -28,86 +29,33 @@ test16: Test analogue front-end frequency response
Note: Requires test00.py to run first to load the firmware!
"""
GN4124_CSR
=
0x0
# Calibration box vendor and product IDs
BOX_USB_VENDOR_ID
=
0x10c4
# Cygnal Integrated Products, Inc.
BOX_USB_PRODUCT_ID
=
0xea60
# CP210x Composite Device
# Agilent AWG serial access vendor and product IDs
AWG_USB_VENDOR_ID
=
0x0403
# Future Technology Devices International, Ltd
AWG_USB_PRODUCT_ID
=
0x6001
# FT232 USB-Serial (UART) IC
AWG_BAUD
=
57600
USB_DEVICE
=
"/dev/ttyUSB0"
RS232_BAUD
=
57600
NB_CHANNELS
=
4
AWG_SET_SLEEP
=
0.
6
AWG_SET_SLEEP
=
0.
2
SSR_SET_SLEEP
=
0.05
BOX_SET_SLEEP
=
0.01
ACQ_TIMEOUT
=
10
MAX_FIRMWARE_RELOAD
=
10
PRE_TRIG_SAMPLES
=
10
POST_TRIG_SAMPLES
=
10000
NB_SHOTS
=
1
ACQ_LENGTH
=
10000
# in samples
DMA_LENGTH
=
4096
# in bytes
# col 0: freq
# col 1: expected amplitude (ADC raw data)
# col 2: tolerance on the amplitude
points
=
[[
10E3
,
33300
,
4000
],
[
100E3
,
33300
,
4000
],
[
1E6
,
33300
,
4000
],
[
5E6
,
33300
,
4000
],
[
6E6
,
33300
,
4000
],
[
7E6
,
33300
,
4000
],
[
8E6
,
33300
,
4000
],
[
9E6
,
33300
,
4000
],
[
10E6
,
21000
,
4000
],
[
11E6
,
21000
,
4000
],
[
12E6
,
21000
,
4000
],
[
13E6
,
21000
,
4000
],
[
14E6
,
21000
,
4000
],
[
15E6
,
16500
,
4000
],
[
16E6
,
15700
,
4000
],
[
17E6
,
15000
,
4000
],
[
18E6
,
14500
,
4000
],
[
19E6
,
14000
,
4000
],
#[20E6, 12500, 4000],
[
21E6
,
12500
,
4000
],
[
22E6
,
12500
,
4000
],
[
23E6
,
12000
,
4000
],
[
24E6
,
11500
,
4000
],
#[25E6, 10000, 4000],
[
30E6
,
9000
,
4000
],
[
32E6
,
9000
,
4000
],
[
34E6
,
9000
,
4000
],
[
36E6
,
9000
,
4000
],
[
38E6
,
9000
,
4000
],
[
40E6
,
4500
,
4000
],
[
42E6
,
4500
,
4000
],
[
44E6
,
4500
,
4000
],
[
46E6
,
4500
,
4000
],
[
48E6
,
4500
,
4000
],
[
60E6
,
1000
,
700
],
[
80E6
,
400
,
300
]]
# The following table is used to test the test
"""
points = [[1E6, 36300, 1000],
[10E6, 24000, 1000],
[15E6, 19500, 1000],
[16E6, 18700, 1000],
[17E6, 18000, 1000],
[18E6, 17500, 1000],
[19E6, 17000, 1000],
[20E6, 15500, 1000],
[21E6, 15500, 1000],
[22E6, 15500, 1000],
[23E6, 15000, 1000],
[24E6, 14500, 1000],
[25E6, 14000, 2000],
[30E6, 12000, 1000],
[40E6, 7500, 1000],
[60E6, 4000, 500],
[80E6, 3400, 200]]
"""
START_FREQ
=
1E6
STOP_FREQ
=
80E6
STEP_FREQ
=
500E3
def
load_firmware
(
default_directory
):
print
(
'Load firmware to FPGA'
)
...
...
@@ -130,7 +78,6 @@ def open_all_channels(fmc):
def
fmc_adc_init
(
spec
,
fmc
):
print
(
'Initialise FMC board.'
)
fmc
.
__init__
(
spec
)
# Reset offset DACs
fmc
.
dc_offset_reset
()
# Make sure all switches are OFF
...
...
@@ -142,7 +89,7 @@ def fmc_adc_init(spec, fmc):
fmc
.
set_post_trig_samples
(
POST_TRIG_SAMPLES
)
fmc
.
set_shots
(
NB_SHOTS
)
# Print configuration
fmc
.
print_adc_core_config
()
#
fmc.print_adc_core_config()
def
set_awg_freq
(
gen
,
sine
,
freq
):
...
...
@@ -151,11 +98,9 @@ def set_awg_freq(gen, sine, freq):
#print('Sine frequency:%3.3fMHz')%(sine.frequency/1E6)
time
.
sleep
(
AWG_SET_SLEEP
)
def
acquisition
(
gnum
,
pages
,
fmc
,
spec_fmc
,
channel_nb
):
def
acq_channels
(
fmc
,
spec_fmc
):
# Make sure no acquisition is running
fmc
.
stop_acq
()
#print('Acquisition FSM state : %s') % fmc.get_acq_fsm_state()
# Start acquisition
fmc
.
start_acq
()
time
.
sleep
(
0.01
)
...
...
@@ -164,30 +109,31 @@ def acquisition(gnum, pages, fmc, spec_fmc, channel_nb):
# Wait end of acquisition
timeout
=
0
while
(
'IDLE'
!=
fmc
.
get_acq_fsm_state
()):
#print fmc.get_acq_fsm_state()
time
.
sleep
(
.1
)
timeout
+=
1
if
(
ACQ_TIMEOUT
<
timeout
):
print
(
'Acquisition timeout. Check that the AWG is switched ON and properly connected.'
)
print
"Acquisition timeout. Missing trigger?."
print
"Acq FSm state:
%
s"
%
fmc
.
get_acq_fsm_state
()
return
1
# Retrieve data trough DMA
channels_data
=
spec_fmc
.
get_data
(
0x0
,
ACQ_LENGTH
*
8
)
return
channels_data
[
channel_nb
-
1
::
4
]
trig_pos
=
fmc
.
get_trig_pos
()
# Enable "DMA done" iinterrupt
spec_fmc
.
set_irq_en_mask
(
0x1
)
# Read ACQ_LENGTH samples after the trigger for all channels
channels_data
=
spec_fmc
.
get_data
((
trig_pos
<<
3
),
ACQ_LENGTH
*
8
)
# Disable "DMA done" iinterrupt
spec_fmc
.
set_irq_en_mask
(
0x0
)
channels_data
=
[
hex2signed
(
item
)
for
item
in
channels_data
]
return
channels_data
def
show_result_graph
(
points
,
ch_diff
,
ch
):
pt
=
array
(
points
)
freq
=
pt
[:,
0
]
a_min
=
pt
[:,
1
]
-
pt
[:,
2
]
a_max
=
pt
[:,
1
]
+
pt
[:,
2
]
cutoff
=
[
-
3
]
*
len
(
points
)
def
show_result_graph
(
freq
,
ch_att
,
ch
):
cutoff
=
[
-
3
]
*
len
(
freq
)
ch_label
=
'Channel'
+
str
(
ch
)
semilogx
(
freq
,
ch_
diff
,
'b'
,
label
=
ch_label
)
semilogx
(
freq
,
ch_
att
,
'b'
,
label
=
ch_label
)
#semilogx(freq, ch_diff[1::4], 'g', label='Channel 2')
#semilogx(freq, ch_diff[2::4], 'm', label='Channel 3')
#semilogx(freq, ch_diff[3::4], 'c', label='Channel 4')
#semilogx(freq, a_min, 'r:', label='Lower limit')
#semilogx(freq, a_max, 'r:', label='Upper limit')
semilogx
(
freq
,
cutoff
,
'r'
,
label
=
'-3dB'
)
grid
(
which
=
'both'
)
legend
(
loc
=
'upper left'
)
...
...
@@ -223,14 +169,14 @@ def main (default_directory='.'):
# Objects declaration
spec
=
rr
.
Gennum
()
# bind to the SPEC board
gnum
=
gn4124
.
CGN4124
(
spec
,
GN4124_CSR
)
spec_fmc
=
spec_fmc_adc
.
CSpecFmcAdc100Ms
(
spec
)
fmc
=
fmc_adc
.
CFmcAdc100Ms
(
spec
)
gen
=
Agilent33250A
(
device
=
USB_DEVICE
,
bauds
=
RS232_BAUD
)
usb_tty
=
find_usb_tty
.
CttyUSB
()
awg_tty
=
usb_tty
.
find_usb_tty
(
AWG_USB_VENDOR_ID
,
AWG_USB_PRODUCT_ID
)
box_tty
=
usb_tty
.
find_usb_tty
(
BOX_USB_VENDOR_ID
,
BOX_USB_PRODUCT_ID
)
gen
=
Agilent33250A
(
device
=
awg_tty
[
0
],
bauds
=
AWG_BAUD
)
sine
=
SineWaveform
()
# Enable "DMA finished" IRQ
spec_fmc
.
set_irq_en_mask
(
0x1
)
box
=
calibr_box
.
CCalibr_box
(
box_tty
[
0
])
# Initialise fmc adc
fmc_adc_init
(
spec
,
fmc
)
...
...
@@ -246,60 +192,53 @@ def main (default_directory='.'):
gen
.
play
(
sine
)
gen
.
output
=
True
# Get physical addresses of the pages for DMA transfer
pages
=
gnum
.
get_physical_addr
()
ch_sel
=
int
(
raw_input
(
'Select a channel [1:4]:'
))
print
(
"Channel
%
d selected."
)
%
ch_sel
# Test frequency response of all channels
ch_
diff
=
[]
ch_
ampl
=
[]
i
=
ch_sel
for
j
in
range
(
len
(
points
)):
set_awg_freq
(
gen
,
sine
,
points
[
j
][
0
])
freq
=
arange
(
START_FREQ
,
STOP_FREQ
,
STEP_FREQ
)
for
j
in
range
(
len
(
freq
)):
set_awg_freq
(
gen
,
sine
,
freq
[
j
])
#for i in range(1,NB_CHANNELS+1):
fmc
.
set_input_range
(
i
,
'1V'
)
fmc
.
set_input_term
(
i
,
'ON'
)
time
.
sleep
(
SSR_SET_SLEEP
)
box
.
select_output_ch
(
i
)
# connect AWG to current channel
time
.
sleep
(
BOX_SET_SLEEP
)
channel_data
=
[]
channel
_data
=
acquisition
(
gnum
,
pages
,
fmc
,
spec_fmc
,
i
)
channel_data
=
[
hex2signed
(
item
)
for
item
in
channel_data
]
channel
s_data
=
acq_channels
(
fmc
,
spec_fmc
)
channel_data
=
channels_data
[
ch_sel
-
1
::
4
]
channel_data_v
=
[
digital2volt
(
item
,
1.0
,
16
)
for
item
in
channel_data
]
diff
=
max
(
channel_data_v
)
-
min
(
channel_data_v
)
print
(
'CH
%
d frequency:
%6.0
f Hz amplitude:
%
f V'
)
%
(
i
,
points
[
j
][
0
],
diff
)
ch_
diff
.
append
(
diff
)
ampl
=
max
(
channel_data_v
)
-
min
(
channel_data_v
)
print
(
'CH
%
d frequency:
%6.0
f Hz amplitude:
%
f V'
)
%
(
i
,
freq
[
j
],
ampl
)
ch_
ampl
.
append
(
ampl
)
fmc
.
set_input_range
(
i
,
'OPEN'
)
fmc
.
set_input_term
(
i
,
'OFF'
)
# Convert volts to dB
ch_att
=
[]
vref
=
ch_ampl
[
0
]
print
"Channel
%
d vref=
%
f"
%
(
ch_sel
,
vref
)
ch_att
=
[(
20
*
log
(
item
/
vref
))
for
item
in
ch_ampl
]
# print freqency response to log
print
(
'Channels frequency response'
)
print
(
'Frequency, CH
%
d value'
)
%
ch_sel
for
i
in
range
(
len
(
points
)):
print
(
'
%2.3
f,
%
f'
)
%
(
points
[
i
][
0
]
/
1E6
,
ch_diff
[
i
])
for
i
in
range
(
len
(
ch_att
)):
print
(
'
%2.3
f,
%
f'
)
%
(
freq
[
i
],
ch_ampl
[
i
])
# print aqcuisition to file
# open test09 log file in read mode
file_name
=
raw_input
(
'Enter a file name (default=log_test16.txt):'
)
if
file_name
==
""
:
file_name
=
"log_test16.txt"
file_name
=
"log_test16.txt"
file
=
open
(
file_name
,
'w'
)
file
.
write
(
"Frequency, CH
%
d amplitude
\n
"
%
ch_sel
)
for
i
in
range
(
len
(
points
)):
file
.
write
(
'
%2.3
f,
%
f
\n
'
%
(
points
[
i
][
0
]
/
1E6
,
ch_diff
[
i
]))
# Convert volts to dB
vref
=
ch_diff
[
0
]
print
(
'vref=
%
f'
)
%
vref
ch_diff
=
[(
20
*
log
(
item
/
vref
))
for
item
in
ch_diff
]
# print freqency response to log
print
(
'Channels frequency response in dB'
)
print
(
'Frequency, CH
%
d value'
)
%
ch_sel
for
i
in
range
(
len
(
points
)):
print
(
'
%2.3
f,
%
f'
)
%
(
points
[
i
][
0
]
/
1E6
,
ch_diff
[
i
])
for
i
in
range
(
len
(
ch_att
)):
file
.
write
(
'
%2.3
f,
%
f
\n
'
%
(
freq
[
i
],
ch_ampl
[
i
]))
# Plot results
show_result_graph
(
points
,
ch_diff
,
ch_sel
)
show_result_graph
(
freq
,
ch_att
,
ch_sel
)
# Make sure all switches are OFF
open_all_channels
(
fmc
)
...
...
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