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adc-lib
Commit fb5af3df authored by Federico Vaga's avatar Federico Vaga
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lib: use API functions to store/apply/restore configuration 

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 4abb96c7
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Showing with 91 additions and 127 deletions
lib/fmc-adc-100m14b4cha.c
View file @ fb5af3df
......@@ -38,6 +38,37 @@
#define __ADC_CONF_CHN_OFFSET_ZERO 200
#define ADC_100M_4CH_14BIT_ACQ_MASK (1LL << ADC_CONF_ACQ_N_SHOTS) | \
(1LL << ADC_CONF_ACQ_POST_SAMP) | \
(1LL << ADC_CONF_ACQ_PRE_SAMP) | \
(1LL << ADC_CONF_ACQ_UNDERSAMPLE) | \
(1LL << ADC_CONF_ACQ_FREQ_HZ) | \
(1LL << ADC_CONF_ACQ_N_BITS)
#define ADC_100M_4CH_14BIT_CHN_MASK (1LL << ADC_CONF_CHN_RANGE) | \
(1LL << ADC_CONF_CHN_TERMINATION) | \
(1LL << ADC_CONF_CHN_OFFSET) | \
(1LL << ADC_CONF_CHN_SATURATION)
#define ADC_100M_4CH_14BIT_BRD_MASK (1LL << ADC_CONF_BRD_STATE_MACHINE_STATUS) | \
(1LL << ADC_CONF_BRD_N_CHAN) | \
(1LL << ADC_CONF_BRD_N_TRG_EXT) | \
(1LL << ADC_CONF_BRD_N_TRG_THR) | \
(1LL << ADC_CONF_BRD_N_TRG_TIM)
#define ADC_100M_4CH_14BIT_CUS_MASK (1ULL << ADC_CONF_100M14B4CHA_BUF_TYPE) | \
(1ULL << ADC_CONF_100M14B4CHA_TRG_SW_EN) | \
(1ULL << ADC_CONF_100M14B4CHA_ACQ_MSHOT_MAX) | \
(1ULL << ADC_CONF_100M14B4CHA_BUF_SIZE_KB)
#define ADC_100M_4CH_14BIT_TRG_EXT_MASK (1LL << ADC_CONF_TRG_EXT_ENABLE) | \
(1LL << ADC_CONF_TRG_EXT_POLARITY) | \
(1LL << ADC_CONF_TRG_EXT_DELAY)
#define ADC_100M_4CH_14BIT_TRG_THR_MASK (1LL << ADC_CONF_TRG_THR_ENABLE) | \
(1LL << ADC_CONF_TRG_THR_POLARITY) | \
(1LL << ADC_CONF_TRG_THR_DELAY) | \
(1LL << ADC_CONF_TRG_THR_THRESHOLD) | \
(1LL << ADC_CONF_TRG_THR_HYSTERESIS)
#define ADC_100M_4CH_14BIT_TRG_TIM_MASK 0x0
static typeof(adc_get_param) *adc_param[] = {
[ADC_CONF_GET] = adc_get_param,
[ADC_CONF_SET] = adc_set_param,
......@@ -741,15 +772,9 @@ static int adc_100m14b4cha_buffer_get_sample(struct adc_buffer *buf,
struct tmp_cfg_store {
uint32_t trg_source;
uint32_t pre;
uint32_t post;
uint32_t nshots;
uint32_t undersample;
uint32_t chan;
uint32_t range;
uint32_t termination;
uint32_t saturation;
uint32_t offset;
struct adc_conf chn[FA100M14B4C_NCHAN];
struct adc_conf acq;
};
static int __cfg_offac_save(struct adc_dev *dev,
......@@ -757,47 +782,29 @@ static int __cfg_offac_save(struct adc_dev *dev,
struct tmp_cfg_store *cfg,
unsigned long flags)
{
int err;
int err, i;
if ((flags & ADC_OFFSET_AC_F_MANUAL) ||
!(flags & ADC_OFFSET_AC_F_RESTORE))
return 0;
cfg->chan = chan;
err = adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_PRE_SAMP,
&cfg->pre, ADC_CONF_GET);
if (err)
goto err;
err = adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_POST_SAMP,
&cfg->post, ADC_CONF_GET);
if (err)
goto err;
err = adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_N_SHOTS,
&cfg->nshots, ADC_CONF_GET);
if (err)
goto err;
err = adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_UNDERSAMPLE,
&cfg->undersample, ADC_CONF_GET);
if (err)
goto err;
err = adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_RANGE,
&cfg->range, ADC_CONF_GET);
if (err)
goto err;
err = adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_TERMINATION,
&cfg->termination, ADC_CONF_GET);
if (err)
goto err;
err = adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_SATURATION,
&cfg->saturation, ADC_CONF_GET);
cfg->acq.type = ADC_CONF_TYPE_ACQ;
cfg->acq.mask = (1ULL << ADC_CONF_ACQ_N_SHOTS) |
(1ULL << ADC_CONF_ACQ_PRE_SAMP) |
(1ULL << ADC_CONF_ACQ_POST_SAMP) |
(1ULL << ADC_CONF_ACQ_UNDERSAMPLE);
err = adc_retrieve_config(dev, &cfg->acq);
if (err)
goto err;
err = adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_OFFSET,
&cfg->offset, ADC_CONF_GET);
for (i = 0; i < FA100M14B4C_NCHAN; ++i) {
memset(&cfg->chn[i], 0, sizeof(struct adc_conf));
cfg->chn[i].type = ADC_CONF_TYPE_CHN;
cfg->chn[i].mask = ADC_100M_4CH_14BIT_CHN_MASK;
}
err = adc_retrieve_config_n(dev, cfg->chn, FA100M14B4C_NCHAN);
if (err)
goto err;
......@@ -823,27 +830,8 @@ static int __cfg_offac_restore(struct adc_dev *dev,
!(flags & ADC_OFFSET_AC_F_RESTORE))
return 0;
err |= adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_PRE_SAMP,
&cfg->pre, ADC_CONF_SET);
err |= adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_POST_SAMP,
&cfg->post, ADC_CONF_SET);
err |= adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_N_SHOTS,
&cfg->nshots, ADC_CONF_SET);
err |= adc_100m14b4cha_config_acq(dev, ADC_CONF_ACQ_UNDERSAMPLE,
&cfg->undersample, ADC_CONF_SET);
err |= adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_RANGE,
&cfg->range, ADC_CONF_SET);
err |= adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_TERMINATION,
&cfg->termination, ADC_CONF_SET);
err |= adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_SATURATION,
&cfg->saturation, ADC_CONF_SET);
err |= adc_100m14b4cha_config_chn(dev, cfg->chan,
ADC_CONF_CHN_OFFSET,
&cfg->offset, ADC_CONF_SET);
err |= adc_apply_config(dev, 0, &cfg->acq);
err |= adc_apply_config_n(dev, 0, cfg->chn, FA100M14B4C_NCHAN);
err |= adc_set_param(dev, "cset0/trigger/source", NULL,
(int *)&cfg->trg_source);
......@@ -852,28 +840,46 @@ static int __cfg_offac_restore(struct adc_dev *dev,
return err;
}
/*
* Following what the configuration for the offset clear computation
*/
#define CFG_OFFAC_NSAMPLES 100000
static struct adc_conf cfg_off_acq = {
.type = ADC_CONF_TYPE_ACQ,
.mask = (1ULL << ADC_CONF_ACQ_N_SHOTS) |
(1ULL << ADC_CONF_ACQ_PRE_SAMP) |
(1ULL << ADC_CONF_ACQ_POST_SAMP) |
(1ULL << ADC_CONF_ACQ_UNDERSAMPLE),
.value = {
[ADC_CONF_ACQ_N_SHOTS] = 1,
[ADC_CONF_ACQ_PRE_SAMP] = 0,
[ADC_CONF_ACQ_POST_SAMP] = CFG_OFFAC_NSAMPLES,
[ADC_CONF_ACQ_UNDERSAMPLE] = 0,
#define CFG_OFFAC_N 3
static struct adc_conf cfg_offac[CFG_OFFAC_N] ={
{
.type = ADC_CONF_TYPE_ACQ,
.mask = (1ULL << ADC_CONF_ACQ_N_SHOTS) |
(1ULL << ADC_CONF_ACQ_PRE_SAMP) |
(1ULL << ADC_CONF_ACQ_POST_SAMP) |
(1ULL << ADC_CONF_ACQ_UNDERSAMPLE),
.value = {
[ADC_CONF_ACQ_N_SHOTS] = 1,
[ADC_CONF_ACQ_PRE_SAMP] = 0,
[ADC_CONF_ACQ_POST_SAMP] = CFG_OFFAC_NSAMPLES,
[ADC_CONF_ACQ_UNDERSAMPLE] = 0,
},
},
};
static struct adc_conf cfg_off_cus = {
.type = ADC_CONF_TYPE_CUS,
.mask = (1ULL << ADC_CONF_100M14B4CHA_TRG_SW_EN) |
(1ULL << ADC_CONF_100M14B4CHA_BUF_SIZE_KB),
.value = {
[ADC_CONF_100M14B4CHA_TRG_SW_EN] = 1,
[ADC_CONF_100M14B4CHA_BUF_SIZE_KB] = 2048,
{
.type = ADC_CONF_TYPE_CUS,
.mask = (1ULL << ADC_CONF_100M14B4CHA_TRG_SW_EN) |
(1ULL << ADC_CONF_100M14B4CHA_BUF_SIZE_KB),
.value = {
[ADC_CONF_100M14B4CHA_TRG_SW_EN] = 1,
[ADC_CONF_100M14B4CHA_BUF_SIZE_KB] = 2048,
},
},
{
.type= ADC_CONF_TYPE_CHN,
.route_to = 0,
.mask = (1LL << ADC_CONF_CHN_TERMINATION) |
(1LL << ADC_CONF_CHN_OFFSET) |
(1LL << ADC_CONF_CHN_SATURATION),
.value = {
[ADC_CONF_CHN_TERMINATION] = 0,
[ADC_CONF_CHN_OFFSET] = 0,
[ADC_CONF_CHN_SATURATION] = 0x7FFF,
},
},
};
......@@ -917,22 +923,9 @@ static int __cfg_offac_apply(struct adc_dev *dev,
if (err)
return -1;
err = adc_apply_config(dev, 0 , &cfg_off_acq);
if (err)
return -1;
err = adc_apply_config(dev, 0 , &cfg_off_cus);
if (err)
return -1;
err = adc_100m14b4cha_config_chn(dev, chan,
ADC_CONF_CHN_RANGE,
&range, ADC_CONF_SET);
if (err)
return -1;
err = adc_100m14b4cha_config_chn(dev, chan,
ADC_CONF_CHN_OFFSET,
&offset, ADC_CONF_SET);
cfg_offac[2].route_to = chan;
adc_set_conf(&cfg_offac[2], ADC_CONF_CHN_RANGE, range);
err = adc_apply_config_n(dev, 0 , cfg_offac, CFG_OFFAC_N);
if (err)
return -1;
......@@ -1044,35 +1037,6 @@ err:
return err;
}
#define ADC_100M_4CH_14BIT_ACQ_MASK (1LL << ADC_CONF_ACQ_N_SHOTS) | \
(1LL << ADC_CONF_ACQ_POST_SAMP) | \
(1LL << ADC_CONF_ACQ_PRE_SAMP) | \
(1LL << ADC_CONF_ACQ_UNDERSAMPLE) | \
(1LL << ADC_CONF_ACQ_FREQ_HZ) | \
(1LL << ADC_CONF_ACQ_N_BITS)
#define ADC_100M_4CH_14BIT_CHN_MASK (1LL << ADC_CONF_CHN_RANGE) | \
(1LL << ADC_CONF_CHN_TERMINATION) | \
(1LL << ADC_CONF_CHN_OFFSET) | \
(1LL << ADC_CONF_CHN_SATURATION)
#define ADC_100M_4CH_14BIT_BRD_MASK (1LL << ADC_CONF_BRD_STATE_MACHINE_STATUS) | \
(1LL << ADC_CONF_BRD_N_CHAN) | \
(1LL << ADC_CONF_BRD_N_TRG_EXT) | \
(1LL << ADC_CONF_BRD_N_TRG_THR) | \
(1LL << ADC_CONF_BRD_N_TRG_TIM)
#define ADC_100M_4CH_14BIT_CUS_MASK (1ULL << ADC_CONF_100M14B4CHA_BUF_TYPE) | \
(1ULL << ADC_CONF_100M14B4CHA_TRG_SW_EN) | \
(1ULL << ADC_CONF_100M14B4CHA_ACQ_MSHOT_MAX) | \
(1ULL << ADC_CONF_100M14B4CHA_BUF_SIZE_KB)
#define ADC_100M_4CH_14BIT_TRG_EXT_MASK (1LL << ADC_CONF_TRG_EXT_ENABLE) | \
(1LL << ADC_CONF_TRG_EXT_POLARITY) | \
(1LL << ADC_CONF_TRG_EXT_DELAY)
#define ADC_100M_4CH_14BIT_TRG_THR_MASK (1LL << ADC_CONF_TRG_THR_ENABLE) | \
(1LL << ADC_CONF_TRG_THR_POLARITY) | \
(1LL << ADC_CONF_TRG_THR_DELAY) | \
(1LL << ADC_CONF_TRG_THR_THRESHOLD) | \
(1LL << ADC_CONF_TRG_THR_HYSTERESIS)
#define ADC_100M_4CH_14BIT_TRG_TIM_MASK 0x0
static struct adc_operations fa_100ms_4ch_14bit_op = {
.open = adc_100m14b4cha_open,
.close = adc_zio_close,
......
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