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level-conversion
conv-common-gw
Commits
ff1fc9c5
Commit
ff1fc9c5
authored
Jul 31, 2014
by
Theodor-Adrian Stana
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Drive unused outputs with safe value
parent
89385741
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conv_common_gw.vhd
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top/conv_common_gw.vhd
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ff1fc9c5
...
...
@@ -126,6 +126,25 @@ entity conv_common_gw is
flash_mosi_o
:
out
std_logic
;
flash_miso_i
:
in
std_logic
;
-- PLL DACs
-- 20 MHz VCXO control
dac20_din_o
:
out
std_logic
;
dac20_sclk_o
:
out
std_logic
;
dac20_sync_n_o
:
out
std_logic
;
-- 125 MHz clock generator control
dac125_din_o
:
out
std_logic
;
dac125_sclk_o
:
out
std_logic
;
dac125_sync_n_o
:
out
std_logic
;
-- SFP lines
sfp_los_i
:
in
std_logic
;
sfp_mod_def0_i
:
in
std_logic
;
sfp_rate_select_o
:
out
std_logic
;
sfp_mod_def1_b
:
inout
std_logic
;
sfp_mod_def2_b
:
inout
std_logic
;
sfp_tx_disable_o
:
out
std_logic
;
sfp_tx_fault_i
:
in
std_logic
;
-- I2C LED signals -- conect to a bicolor LED of choice
-- led_i2c_o pulses four times on I2C transfer
-- led_i2c_err_o reflects the state of SR.I2C_ERR bit in conv_regs
...
...
@@ -1007,6 +1026,23 @@ begin
line_oen_o
=>
bicolor_led_line_oen_o
);
--============================================================================
-- Drive unused outputs with safe values
--============================================================================
-- DAC outputs: enables to '1' (disable DAC comm interface) and SCK, DIN to '0'
dac20_sync_n_o
<=
'1'
;
dac20_din_o
<=
'0'
;
dac20_sclk_o
<=
'0'
;
dac125_sync_n_o
<=
'1'
;
dac125_din_o
<=
'0'
;
dac125_sclk_o
<=
'0'
;
-- SFP lines all open-drain, set to high-impedance
sfp_rate_select_o
<=
'Z'
;
sfp_mod_def1_b
<=
'Z'
;
sfp_mod_def2_b
<=
'Z'
;
sfp_tx_disable_o
<=
'Z'
;
end
architecture
arch
;
--==============================================================================
-- architecture end
...
...
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