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White Rabbit core collection
Commit 8ca8251f authored by Konstantinos Blantos's avatar Konstantinos Blantos
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Update .gitlab-ci.yml

parent 45cc5af1
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    .gitlab-ci.yml
    View file @ 8ca8251f
    ......@@ -67,76 +67,79 @@ stages:
    # - testbench/wr_streamers/streamers-only_basic-transfer/transcript
    # - testbench/wr_streamers/streamers_multi_test/transcript
    #job_wrpc_spec:
    # stage: wrpc_syn
    # tags:
    job_wrpc_spec:
    stage: wrpc_syn
    tags:
    # - ise_14.7
    - xilinx_ISE_14.7
    # only:
    # - schedules
    # script:
    # - /entrypoint.sh
    # - source ~/setup_ise147.sh
    # - source /opt/Xilinx/14.7/ISE_DS/settings64.sh
    # - cd syn/spec_ref_design && hdlmake makefile && make
    # artifacts:
    # name: WRPC_SPEC_CI_$CI_JOB_ID
    # paths:
    # - syn/spec_ref_design/*.syr
    # - syn/spec_ref_design/*.mrp
    # - syn/spec_ref_design/*.bit
    # - syn/spec_ref_design/*.bin
    script:
    - /entrypoint.sh
    - source ~/setup_ise147.sh
    - source /opt/Xilinx/14.7/ISE_DS/settings64.sh
    - cd syn/spec_ref_design && hdlmake makefile && make
    artifacts:
    name: WRPC_SPEC_CI_$CI_JOB_ID
    paths:
    - syn/spec_ref_design/*.syr
    - syn/spec_ref_design/*.mrp
    - syn/spec_ref_design/*.bit
    - syn/spec_ref_design/*.bin
    #job_wrpc_svec:
    # stage: wrpc_syn
    # tags:
    job_wrpc_svec:
    stage: wrpc_syn
    tags:
    # - ise_14.7
    - xilinx_ISE_14.7
    # only:
    # - schedules
    # script:
    # - /entrypoint.sh
    # - source ~/setup_ise147.sh
    # - source /opt/Xilinx/14.7/ISE_DS/settings64.sh
    # - cd syn/svec_ref_design && hdlmake makefile && make
    # artifacts:
    # name: WRPC_SVEC_CI_$CI_JOB_ID
    # paths:
    # - syn/svec_ref_design/*.syr
    # - syn/svec_ref_design/*.mrp
    # - syn/svec_ref_design/*.bit
    # - syn/svec_ref_design/*.bin
    script:
    - /entrypoint.sh
    - source ~/setup_ise147.sh
    - source /opt/Xilinx/14.7/ISE_DS/settings64.sh
    - cd syn/svec_ref_design && hdlmake makefile && make
    artifacts:
    name: WRPC_SVEC_CI_$CI_JOB_ID
    paths:
    - syn/svec_ref_design/*.syr
    - syn/svec_ref_design/*.mrp
    - syn/svec_ref_design/*.bit
    - syn/svec_ref_design/*.bin
    #job_wrpc_vfchd:
    # stage: wrpc_syn
    # tags:
    job_wrpc_vfchd:
    stage: wrpc_syn
    tags:
    # - quartus_16
    - altera_quartus_16
    # only:
    # - schedules
    # script:
    # - /entrypoint.sh
    # - source ~/setup_intel.sh
    # - cd syn/vfchd_ref_design
    # - hdlmake makefile
    # - cat Makefile
    # - make
    # artifacts:
    # name: WRPC_VFCHD_CI_$CI_JOB_ID
    # paths:
    # - syn/vfchd_ref_design/*.sof
    # - syn/vfchd_ref_design/*.rpt
    # - syn/vfchd_ref_design/*.rpt
    # - syn/vfchd_ref_design/*.summary
    # - syn/vfchd_ref_design/*.map.rpt
    # - syn/vfchd_ref_design/*.map.summary
    # - syn/vfchd_ref_design/*.sta.rpt
    # - syn/vfchd_ref_design/*.sta.summary
    script:
    - /entrypoint.sh
    - source ~/setup_intel.sh
    - cd syn/vfchd_ref_design
    - hdlmake makefile
    - cat Makefile
    - make
    artifacts:
    name: WRPC_VFCHD_CI_$CI_JOB_ID
    paths:
    - syn/vfchd_ref_design/*.sof
    - syn/vfchd_ref_design/*.rpt
    - syn/vfchd_ref_design/*.rpt
    - syn/vfchd_ref_design/*.summary
    - syn/vfchd_ref_design/*.map.rpt
    - syn/vfchd_ref_design/*.map.summary
    - syn/vfchd_ref_design/*.sta.rpt
    - syn/vfchd_ref_design/*.sta.summary
    job_wrpc_pxie_fmc:
    stage: wrpc_syn
    tags:
    - vivado_20183
    image: sha256:f7b99d6fe7b8b7da531b4546c367831a9218a8fac4c2aa1ffe1c5469864a9e6c
    only:
    - schedules
    # only:
    # - schedules
    script:
    - /entrypoint.sh
    # - source ~/setup_vivado.sh
    ......
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