test: add basic tests

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

test: add basic tests
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
fea31f85 · Federico Vaga · a62bdb07 · fea31f85 · fea31f85 · fea31f85
Commit fea31f85 authored Mar 19, 2018 by Federico Vaga
16 changed files
--- a/tests/conftest.py
+++ b/tests/conftest.py
+import os
+import PyMockTurtle
+import pytest
+
+@pytest.fixture(scope="module")
+def devid():
+    return 0x1
+
+@pytest.fixture(scope="module")
+def cfg():
+    cfg = PyMockTurtle.TrtlConfig()
+    cfg.signature = PyMockTurtle.TrtlConfig.TRTL_CONFIG_ROM_SIGNATURE
+    cfg.version = 0
+    cfg.pad = 0
+    cfg.clock_freq = 0
+    cfg.flags = 0
+    cfg.app_id = 0xd330d330
+    cfg.n_cpu = 2
+    cfg.smem_size = 0x00002000
+    cfg.hmq_width = 0
+    return cfg
+
+@pytest.fixture(scope="module", params=range(cfg().n_cpu))
+def cpu_idx(request):
+    return request.param
+
+
+@pytest.fixture(scope="module", params=[0x1])
+def trtl_device(request):
+    dev = PyMockTurtle.TrtlDevice(request.param)
+    return dev
+
+@pytest.fixture(scope="module", params=range(cfg().n_cpu))
+def trtl_cpu(request):
+    dev = PyMockTurtle.TrtlDevice(devid())
+    yield dev.cpu[request.param]
+    dev.cpu[request.param].disable()
+
+@pytest.fixture(scope="module")
+def trtl_shm():
+    dev = PyMockTurtle.TrtlDevice(devid())
+    return dev.shm
+
+@pytest.fixture(scope="module")
+def trtl_hmq():
+   dev = PyMockTurtle.TrtlDevice(devid())
+   return dev
--- a/tests/firmware/.gitignore
+++ b/tests/firmware/.gitignore
+*.elf
+*.bin
+*.o
--- a/tests/firmware/Makefile
+++ b/tests/firmware/Makefile
+DIRS := serial
+DIRS += cpu-loop
+DIRS += config_rom
+
+all: $(DIRS)
+
+$(DIRS):
+	$(MAKE) -C $@
+
+.PHONY : all $(DIRS)
--- a/tests/firmware/config_rom/Makefile
+++ b/tests/firmware/config_rom/Makefile
+OBJS = config_rom.o
+OBJS += # add other object files that you need
+OUTPUT = fw-config-rom
+TRTL ?= ../../../
+TRTL_SW = $(TRTL)/software
+
+CFLAGS_OPT = -O0  # disable optimization
+
+EXTRA_CFLAGS += -DFPGA_APPLICATION_ID=0x0
+EXTRA_CFLAGS += -DRT_APPLICATION_ID=0x0
+
+
+MOCKTURTLE_LIBRARY_PRINT_ENABLE := 1
+MOCKTURTLE_LIBRARY_PRINT_DEBUG_ENABLE := 0
+# Firmware Libray configuration
+MOCKTURTLE_FRAMEWORK_ENABLE := 0
+
+include $(TRTL_SW)/rt/Makefile
--- a/tests/firmware/config_rom/config_rom.c
+++ b/tests/firmware/config_rom/config_rom.c
+#include <mockturtle-rt.h>
+#include <hw/mockturtle_config.h>
+
+int main()
+{
+	int i, n_word = sizeof(struct trtl_config_rom) / 4;
+	const struct trtl_config_rom *cfgrom = trtl_config_rom_get();
+	const uint32_t *data = (const uint32_t *)cfgrom;
+	uint32_t *msg;
+
+	pr_debug("CONFIG ROM\r\n");
+	mq_claim(TRTL_HMQ, 0);
+	msg = mq_map_out_buffer(TRTL_HMQ, 0);
+	for (i = 0; i < n_word; i++) {
+		msg[i] = data[i];
+		pr_debug("%p = 0x%08"PRIx32"\r\n", &data[i], data[i]);
+	}
+	mq_send(TRTL_HMQ, 0, n_word);
+
+	return 0;
+}
--- a/tests/firmware/cpu-loop/Makefile
+++ b/tests/firmware/cpu-loop/Makefile
+OBJS = cpu-loop.o
+OBJS += # add other object files that you need
+OUTPUT = fw-loop
+TRTL ?= ../../../
+TRTL_SW = $(TRTL)/software
+
+CFLAGS_OPT = -O0  # disable optimization
+
+EXTRA_CFLAGS += -DFPGA_APPLICATION_ID=0x0
+EXTRA_CFLAGS += -DRT_APPLICATION_ID=0x0
+
+
+MOCKTURTLE_LIBRARY_PRINT_ENABLE := 1
+# Firmware Libray configuration
+MOCKTURTLE_FRAMEWORK_ENABLE := 0
+
+include $(TRTL_SW)/rt/Makefile
--- a/tests/firmware/cpu-loop/cpu-loop.c
+++ b/tests/firmware/cpu-loop/cpu-loop.c
+#include <mockturtle-rt-serial.h>
+
+int main()
+{
+	int sum = 0;
+
+	while (1)
+		sum ++;
+
+	return 0;
+}
--- a/tests/firmware/serial/Makefile
+++ b/tests/firmware/serial/Makefile
+OBJS = serial.o
+OBJS += # add other object files that you need
+OUTPUT = fw-serial
+TRTL ?= ../../../
+TRTL_SW = $(TRTL)/software
+
+EXTRA_CFLAGS += -DFPGA_APPLICATION_ID=0x0
+EXTRA_CFLAGS += -DRT_APPLICATION_ID=0x0
+
+
+MOCKTURTLE_LIBRARY_PRINT_ENABLE := 1
+# Firmware Libray configuration
+MOCKTURTLE_FRAMEWORK_ENABLE := 0
+
+include $(TRTL_SW)/rt/Makefile
--- a/tests/firmware/serial/serial.c
+++ b/tests/firmware/serial/serial.c
+#include <mockturtle-rt-serial.h>
+
+int main()
+{
+	pp_printf("this is a message\r\n");
+	pr_debug("that goes through the serial interface\n\r");
+	pr_error("and we use it for testing\r\n");
+	return 0;
+}
--- a/tests/pytest.ini
+++ b/tests/pytest.ini
+[pytest]
\ No newline at end of file
--- a/tests/test_config.py
+++ b/tests/test_config.py
+import os
+import pytest
+import PyMockTurtle
+import time
+
+@pytest.fixture
+def firmware_file_config():
+    testdir = os.path.dirname(os.path.abspath(os.path.realpath(__file__)))
+    return os.path.join(testdir, "firmware/config_rom/fw-config-rom.bin")
+
+
+class TestConfig(object):
+    def test_exist(self, devid):
+        assert os.path.exists("/sys/class/mockturtle/trtl-{:04x}/config-rom".format(devid)) == True
+
+    def test_valid_host(self, trtl_device, cfg):
+        assert trtl_device.rom.signature == cfg.signature
+        assert trtl_device.rom.app_id == cfg.app_id
+        assert trtl_device.rom.n_cpu == cfg.n_cpu
+
+    def test_valid_softcpu(self, trtl_device, trtl_cpu, devid, cfg):
+        trtl_hmq = PyMockTurtle.TrtlHmq(devid, 0, PyMockTurtle.TrtlHmq.FLAGS_DIR_OUT)
+
+        trtl_cpu.disable()
+        trtl_cpu.load_application_file(firmware_file_config())
+        trtl_cpu.enable()
+
+        # Give time to the soft-CPU to build and send the message
+        time.sleep(0.1)
+
+        msg = trtl_hmq.recv_msg()
+
+        del trtl_hmq
+
+        assert msg.payload[0] == cfg.signature
+        assert msg.payload[5] == cfg.app_id
+        assert msg.payload[6] == cfg.n_cpu
--- a/tests/test_cpu.py
+++ b/tests/test_cpu.py
+import hashlib
+import os
+import pytest
+import time
+
+@pytest.fixture
+def firmware_file_loop():
+    testdir = os.path.dirname(os.path.abspath(os.path.realpath(__file__)))
+    return os.path.join(testdir, "firmware/cpu-loop/fw-loop.bin")
+
+
+class TestCPU(object):
+    def test_cpu(self):
+        pass
+
+    def test_exist(self, trtl_cpu):
+        path = "/dev/mockturtle/trtl-{:04x}-cpu-{:02d}".format(trtl_cpu.device_id,
+                                                               trtl_cpu.cpu_index)
+        assert True == os.path.exists(path)
+
+    def test_disable(self, trtl_cpu):
+        trtl_cpu.disable()
+        assert False == trtl_cpu.is_enable()
+
+    def test_enable(self, trtl_cpu):
+        trtl_cpu.enable()
+        assert True == trtl_cpu.is_enable()
+
+    def test_load(self, trtl_cpu):
+        trtl_cpu.disable()
+        trtl_cpu.load_application_file(firmware_file_loop())
+        trtl_cpu.enable()
+
+        time.sleep(1)
+
+        trtl_cpu.disable()
+        trtl_cpu.dump_application_file("/tmp/dump.bin")
+
+        with open(firmware_file_loop(), 'rb') as f:
+            data_o = f.read()
+            md5_o = hashlib.md5(data_o).hexdigest()
+
+        with open("/tmp/dump.bin", 'rb') as f:
+            data_d = f.read(len(data_o))
+            md5_d = hashlib.md5(data_d).hexdigest()
+
+        assert md5_o == md5_d
--- a/tests/test_device.py
+++ b/tests/test_device.py
+import os
+
+class TestDevice(object):
+    def test_exist(self, devid):
+        assert os.path.isdir("/sys/class/mockturtle/trtl-{:04x}".format(devid)) == True
--- a/tests/test_hmq.py
+++ b/tests/test_hmq.py
+import pytest
+
+class TestHmq(object):
+    def test_async_send(self, trtl_hmq):
+        pass
+
+    def test_async_recv(self, trtl_hmq):
+        pass
+
+    def test_sync(self, trtl_hmq):
+        pass
--- a/tests/test_serial.py
+++ b/tests/test_serial.py
+import os
+import pytest
+import stat
+import time
+
+@pytest.fixture
+def firmware_file_serial():
+    testdir = os.path.dirname(os.path.abspath(os.path.realpath(__file__)))
+    return os.path.join(testdir, "firmware/serial/fw-serial.bin")
+
+@pytest.fixture
+def firmware_output():
+    return ["this is a message\r\n",
+                ]
+
+    # FIXME test different print level
+    # return ["this is a message\r\n",
+    #         "this is a message\r\nand we use it for testing\r\n",
+    #         "this is a message\r\nthat goes through the serial interface\n\rand we use it for testing\r\n"]
+
+
+class TestSerial(object):
+    def test_exist(self, cpu_idx):
+        assert os.path.exists("/dev/ttyTRTL{:d}".format(cpu_idx)) == True
+
+    def test_chardevice(self, cpu_idx):
+        st = os.stat("/dev/ttyTRTL{:d}".format(cpu_idx))
+        assert stat.S_ISCHR(st.st_mode) == True
+
+    def test_permission(self, cpu_idx):
+        st = os.stat("/dev/ttyTRTL{:d}".format(cpu_idx))
+        assert st.st_mode & stat.S_IRUSR != 0
+        assert st.st_mode & stat.S_IRGRP != 0
+
+    @pytest.mark.parametrize("msg_ref", enumerate(firmware_output()))
+    def test_print(self, trtl_cpu, msg_ref):
+        trtl_cpu.disable()
+        trtl_cpu.load_application_file(firmware_file_serial())
+
+        f = os.open("/dev/ttyTRTL{:d}".format(trtl_cpu.cpu_index),
+                    os.O_RDONLY | os.O_NONBLOCK)
+
+        trtl_cpu.enable()
+        time.sleep(1)  # wait for all the characters
+        nbyte = len(msg_ref[1])
+        msg = os.read(f, nbyte).decode()
+        os.close(f)
+
+        assert msg_ref[1] == msg
--- a/tests/test_shm.py
+++ b/tests/test_shm.py
+class TestShm(object):
+    def test_direct_sequence(self, trtl_shm):
+        pass
+        # trtl_shm.write_direct(0, range(0, 1024))
+        # dump = trtl_shm.read(0, 1024)
+
+        # for addr in range(0, 1024):
+        #     assert addr == dump[addr]