hdl: wire missing RMQ out status to local registers

fc6e8d81 · Dimitris Lampridis · 94aed93d · fc6e8d81 · fc6e8d81
Commit fc6e8d81 authored Jun 12, 2018 by Dimitris Lampridis
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Showing with 27 additions and 21 deletions

mt_cpu_cb.vhd hdl/rtl/cpu/mt_cpu_cb.vhd +13 -11

mt_mqueue_remote.vhd hdl/rtl/mqueue/mt_mqueue_remote.vhd +14 -10

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--- a/hdl/rtl/cpu/mt_cpu_cb.vhd
+++ b/hdl/rtl/cpu/mt_cpu_cb.vhd
@@ -360,17 +360,19 @@ begin  -- arch
      g_CONFIG => a_rmq_config
      )
    port map (
-      clk_i        => clk_sys_i,
-      rst_n_i      => rst_n_i,
-      slave_i      => cnx_master_out(c_SLAVE_RMQ),
-      slave_o      => cnx_master_in(c_SLAVE_RMQ),
-      src_o        => rmq_src_o,
-      src_i        => rmq_src_i,
-      snk_i        => rmq_snk_i,
-      snk_o        => rmq_snk_o,
-      rmq_status_o => local_regs_in.rmq_stat_in_i(a_rmq_config.slot_count-1 downto 0));
-
-  local_regs_in.rmq_stat_in_i(7 downto a_rmq_config.slot_count) <= (others => '0');
+      clk_i            => clk_sys_i,
+      rst_n_i          => rst_n_i,
+      slave_i          => cnx_master_out(c_SLAVE_RMQ),
+      slave_o          => cnx_master_in(c_SLAVE_RMQ),
+      src_o            => rmq_src_o,
+      src_i            => rmq_src_i,
+      snk_i            => rmq_snk_i,
+      snk_o            => rmq_snk_o,
+      rmq_in_status_o  => local_regs_in.rmq_stat_in_i(a_rmq_config.slot_count-1 downto 0),
+      rmq_out_status_o => local_regs_in.rmq_stat_out_i(a_rmq_config.slot_count-1 downto 0));
+
+  local_regs_in.rmq_stat_in_i(7 downto a_rmq_config.slot_count)  <= (others => '0');
+  local_regs_in.rmq_stat_out_i(7 downto a_rmq_config.slot_count) <= (others => '0');

  U_Local_Interconnect : xwb_crossbar
    generic map (

--- a/hdl/rtl/mqueue/mt_mqueue_remote.vhd
+++ b/hdl/rtl/mqueue/mt_mqueue_remote.vhd
@@ -33,17 +33,19 @@ entity mt_mqueue_remote is
  generic (
    g_CONFIG : t_mt_mqueue_config := c_MT_DEFAULT_MQUEUE_CONFIG);
  port (
-    clk_i        : in  std_logic;
-    rst_n_i      : in  std_logic;
-    slave_i      : in  t_wishbone_slave_in;
-    slave_o      : out t_wishbone_slave_out;
+    clk_i            : in  std_logic;
+    rst_n_i          : in  std_logic;
+    slave_i          : in  t_wishbone_slave_in;
+    slave_o          : out t_wishbone_slave_out;
    --  From OUT rmq
-    src_o        : out t_mt_stream_source_out_array(0 to g_CONFIG.slot_count-1);
-    src_i        : in  t_mt_stream_source_in_array(0 to g_CONFIG.slot_count-1);
+    src_o            : out t_mt_stream_source_out_array(0 to g_CONFIG.slot_count-1);
+    src_i            : in  t_mt_stream_source_in_array(0 to g_CONFIG.slot_count-1);
    --  To IN rmq
-    snk_o        : out t_mt_stream_sink_out_array(0 to g_CONFIG.slot_count-1);
-    snk_i        : in  t_mt_stream_sink_in_array(0 to g_CONFIG.slot_count-1);
-    rmq_status_o : out std_logic_vector(g_CONFIG.slot_count-1 downto 0));
+    snk_o            : out t_mt_stream_sink_out_array(0 to g_CONFIG.slot_count-1);
+    snk_i            : in  t_mt_stream_sink_in_array(0 to g_CONFIG.slot_count-1);
+    -- RMQ status
+    rmq_in_status_o  : out std_logic_vector(g_CONFIG.slot_count-1 downto 0);
+    rmq_out_status_o : out std_logic_vector(g_CONFIG.slot_count-1 downto 0));
 end mt_mqueue_remote;

 architecture arch of mt_mqueue_remote is
@@ -102,6 +104,8 @@ begin  -- rtl
        src_o       => src_o(i),
        src_i       => src_i(i));

+    rmq_out_status_o (i) <= not outgoing_stat(i).full;
+
    U_In_SlotX : entity work.mt_mqueue_slot
      generic map (
        g_CONFIG  => g_config.slot_config(i))
@@ -126,7 +130,7 @@ begin  -- rtl
        snk_i            => snk_i(i),
        snk_o            => snk_o(i));

-    rmq_status_o (i) <= not incoming_stat(i).empty;
+    rmq_in_status_o (i) <= not incoming_stat(i).empty;
  end generate gen_slots;

 end architecture arch;