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hdl-core-lib
mock-turtle
Commits
71f76b73
Commit
71f76b73
authored
Aug 02, 2018
by
Dimitris Lampridis
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hdl: add missing signal to sensitivity list
parent
32333315
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mt_rmq_endpoint_tx.vhd
hdl/rtl/endpoint/mt_rmq_endpoint_tx.vhd
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hdl/rtl/endpoint/mt_rmq_endpoint_tx.vhd
View file @
71f76b73
...
...
@@ -89,7 +89,7 @@ begin -- arch
end
if
;
end
process
p_write_config_regs
;
p_read_config_regs
:
process
(
snk_config_i
)
p_read_config_regs
:
process
(
config
,
snk_config_i
)
begin
case
to_integer
(
unsigned
(
snk_config_i
.
adr
(
9
downto
2
)))
is
when
c_ADDR_CONFIG
=>
...
...
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