Remove common files and modify Manifests to take local files.

5bd12eae · Matthieu Cattin · 00cdfb46 · 00cdfb46 · 00cdfb46 · 00cdfb46
Commit 5bd12eae authored Nov 16, 2012 by Matthieu Cattin
14 changed files
--- a/hdl/common/ip_cores/rtl/Manifest.py
+++ b/hdl/common/ip_cores/rtl/Manifest.py
-files = ["iodrp_controller.vhd",
-         "iodrp_mcb_controller.vhd",
-         "mcb_raw_wrapper.vhd",
-         "mcb_soft_calibration_top.vhd",
-         "mcb_soft_calibration.vhd"]
--- a/hdl/common/ip_cores/rtl/iodrp_controller.vhd
+++ b/hdl/common/ip_cores/rtl/iodrp_controller.vhd
--- a/hdl/common/ip_cores/rtl/iodrp_mcb_controller.vhd
+++ b/hdl/common/ip_cores/rtl/iodrp_mcb_controller.vhd
--- a/hdl/common/ip_cores/rtl/mcb_raw_wrapper.vhd
+++ b/hdl/common/ip_cores/rtl/mcb_raw_wrapper.vhd
--- a/hdl/common/ip_cores/rtl/mcb_soft_calibration.vhd
+++ b/hdl/common/ip_cores/rtl/mcb_soft_calibration.vhd
--- a/hdl/common/ip_cores/rtl/mcb_soft_calibration_top.vhd
+++ b/hdl/common/ip_cores/rtl/mcb_soft_calibration_top.vhd
--- a/hdl/spec/ip_cores/ddr3_ctrl_spec_bank3_32b_32b/user_design/rtl/Manifest.py
+++ b/hdl/spec/ip_cores/ddr3_ctrl_spec_bank3_32b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_spec_bank3_32b_32b.vhd",
         "memc3_infrastructure.vhd",
-         "memc3_wrapper.vhd"]
+         "memc3_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]
--- a/hdl/spec/ip_cores/ddr3_ctrl_spec_bank3_64b_32b/user_design/rtl/Manifest.py
+++ b/hdl/spec/ip_cores/ddr3_ctrl_spec_bank3_64b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_spec_bank3_64b_32b.vhd",
         "memc3_infrastructure.vhd",
-         "memc3_wrapper.vhd"]
+         "memc3_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]
--- a/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_32b_32b/user_design/rtl/Manifest.py
+++ b/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_32b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_svec_bank4_32b_32b.vhd",
         "memc4_infrastructure.vhd",
-         "memc4_wrapper.vhd"]
+         "memc4_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]
--- a/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/Manifest.py
+++ b/hdl/svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_svec_bank4_64b_32b.vhd",
         "memc4_infrastructure.vhd",
-         "memc4_wrapper.vhd"]
+         "memc4_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]
--- a/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_32b_32b/user_design/rtl/Manifest.py
+++ b/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_32b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_svec_bank5_32b_32b.vhd",
         "memc5_infrastructure.vhd",
-         "memc5_wrapper.vhd"]
+         "memc5_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]
--- a/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/Manifest.py
+++ b/hdl/svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_svec_bank5_64b_32b.vhd",
         "memc5_infrastructure.vhd",
-         "memc5_wrapper.vhd"]
+         "memc5_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]
--- a/hdl/vfc/ip_cores/ddr3_ctrl_vfc_bank1_32b_32b/user_design/rtl/Manifest.py
+++ b/hdl/vfc/ip_cores/ddr3_ctrl_vfc_bank1_32b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_vfc_bank1_32b_32b.vhd",
         "memc1_infrastructure.vhd",
-         "memc1_wrapper.vhd"]
+         "memc1_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]
--- a/hdl/vfc/ip_cores/ddr3_ctrl_vfc_bank1_64b_32b/user_design/rtl/Manifest.py
+++ b/hdl/vfc/ip_cores/ddr3_ctrl_vfc_bank1_64b_32b/user_design/rtl/Manifest.py
 files = ["ddr3_ctrl_vfc_bank1_64b_32b.vhd",
         "memc1_infrastructure.vhd",
-         "memc1_wrapper.vhd"]
+         "memc1_wrapper.vhd",
+         "iodrp_controller.vhd",
+         "iodrp_mcb_controller.vhd",
+         "mcb_raw_wrapper.vhd",
+         "mcb_soft_calibration_top.vhd",
+         "mcb_soft_calibration.vhd"]