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This project guides new users to start in the White Rabbit “World” with simple experiments. The starting kit uses two SPEC + FMC-DIO cards. Each node allows basic operations such as input timestamping or programmable output pulse generation. Additionally, specific software and gateware layers allow to use it as a standard network interface card implementing the White Rabbit technology functionalities.

Software support for the SVEC board, including kernel and user-space Linux code.

Gateware (VHDL) for the level conversion board Conv TTL Blocking in VME64x form factor between TTL and blocking levels. More info at the Wiki page

A software suite written in Python to help with production tests of PCBs. AKA PTS.

%(red)This pts-base project is used to re-organise the current pts project In the future this project will replace the existing pts project.

More info at the Wiki page

A fully operational stand-alone FMC Delay card based White-Rabbit node which can be initialized and perform periodic calibrations without requiring to be plugged on a PC, reducing final system cost, size and power consumption. More info at the Wiki page

Gateware (HDL design) for FMC TDC 1ns 5cha on SPEC and SVEC carriers.

Gateware (HDL design) for MasterFIP.

Common gateware for the different level conversion circuits.

Production and functional tests for Conv TTL Blocking. More info at the Wiki page

Gateware (HDL design) for Conv TTL RS485

Production and functional tests for Conv TTL RS485

EPICS support for Wishbone peripherals: This project consist of a Generic EPICS IOC AsynDriver to support wishbone peripheral. It include the following features:

Driver for X1052, Gennum, Etherbone WB master. Direct access to any register in the wishbone bus Auto-generation of EPICS Database file using wbgen2 Automatic real number convertion (2 complements, fixed point, signess) using .wb file Support for WR Core and other internal bus protocols (i2c, spi, etc.)

More info at the Wiki page

SDB (Self-describing Bus) allows to enumerate the cores that are live in the current FPGA binary, either from the host computer or from the internal soft-core CPU in the FPGA itself. The project provides the software support and the specification. More info at the Wiki page

This library provides a generic API for ADC devices, so that applications can use this API to access any of the supported ADC boards. Currently the library supports the following boards:

fmc-adc-100m14b14cha

For testing and debugging purpose it supports also a couple of virtual boards that you can use to start the development of your application.

More info at the Wiki page

Gateware (HDL design) for FMC ADC 400k 18b 4cha iso on SPEC and SVEC carriers.

Data centre environmental sensor - Dust, Temperature, Relative Humidity, Fan - Serial 1 channel - version 1. An environmental sensor for Data Centers that continuously measures airborne particle density in high airflow as well as temperature and relative humidity. It can control its fan speed if needed (PWM controlled fans) and monitors FAN rotational speed (tachometer equipped fans) for precise airflow control and monitoring. It is close to maintenance free and can be integrated in compact enclosures (for example tape drive tray or even an ATX PSU case...). More info at the Wiki page

On the Open Hardware Repository you can find projects which use soft-cpu (e.g. mock-turtle, white-rabbit-core, wr-switch). This project offers a toolchain that you can use to compile your code for the soft-cpu target (only LM32 for the time being). The project provides only the necessary makefiles to build the toolchain, so it will be necessary to compile the toolchain.

LIBSFP is a software library that contains generic functions to access SFP devices via I2C.

More info can be found on this wiki page.

LIST is a trigger distribution system based on White Rabbit. It can receive a trigger from a “cloud” of devices and distribute it to all relevant devices to for example freeze their acquisition buffers. The latency between reception and transmission of a trigger is done with a low and notably fixed latency, with an accuracy of better than 1 ns. The hardware of the LIST nodes is based on the SVEC FMC carrier equipped with a FMC TDC mezzanine and a Fine Delay mezzanine. More info at the Wiki page

A system to characterize large area silicon pad sensors with several hundred channels. This repository contains the microcontroller firmware.