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Production and functional tests for fmc-dac-600m-12b-1cha-dds
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A bridge between the local bus of the Gennum GN4124 (PCIe to local bus bridge) and Wishbone.
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The TimIQ system is an IQ modulator allowing to phase shift a radio frequency clock with a resolution of 40 fs and an accuracy of 8 ps. Software.
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Pascal Bos / Hdlmake
GNU General Public License v3.0 onlyTool for generating multi-purpose makefiles for FPGA projects.
Main features:
makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefilesHdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page
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Multi-channel Time Interval Counter and fine delay generator. Housed in a 19" module. Research project. More info at the Wiki page
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VHDL coding style document to be used at ohwr.org The project contains also a tool to automatically check the coding style. More info at the Wiki page
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Projects / openMMC
GNU General Public License v3.0 onlyMMC firmware written in C, running on a microcontroller inside the board. Written first for the AFC boards. This firmware is thought to be generic enough so other AMC boards could reuse a large part of it. For now, the only "port" is for the LPC1764 chip, but more are planned.
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High performance pulse and frequency distribution amplifier for time and frequency metrology. The pulse distribution board is an 1:8-channel (1 Hz and up) logic-level distribution amplifier, while the frequency distribution board is an 1:8-channel sine-wave (1-30 MHz) distribution amplifier. Two 1:8 boards fit side-by-sides in a 1U 19" rack enclosure, with either BNC or SMA connectors.
For more information, see the wiki
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Software to support the FMC ADC 400k 18b 4cha iso mezzanine, including Linux device driver, library and test program.
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The VFC is a VME carrier for two VITA 57 (FMC) mezzanines. For more details please refer to the wiki pages. Obsolete project. Replaced by VFC-HD.
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This project focuses on performing with high precision the core WR PTP calculations in fixed-point arithmetic. This will ensure uniform input parameters, code and precision across all WR implementations.
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Projects / Euro ADC 65M 14b 40cha gw PUMA-gw
Apache License 2.0Updated -
Rules for low-level software to check an FPGA for sanity, to ease debugging and to provide support for low-level software auto-configuration for byte-order and optional components. More info at Wiki
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A software suite written in Python to help with production tests of PCBs. AKA PTS.
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Configuration and boot software required to start up the SPEC7 board
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Programmable attenuator of RF signals with very high voltage range (50mV – 1000 V) for protecting digitizers against damage by high voltage signals. Four channels with SMA connectors; Three attenuation values: 0, -20, -40 dB; Bandwidth: DC – 2 GHz.
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Production and functional tests for FMC TDC 1ns 5cha.
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A distributed oscilloscope based on the White Rabbit network. More info at the Wiki page
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Mathieu Saccani / VME64x core - msaccani
GNU Lesser General Public License v2.1 onlyA VHDL core for a VME64x slave. The other side behaves like a Wishbone master.
More info at the Wiki pageUpdated