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euro-adc-65m-14b-40cha-gw
Commit dc27f6e6 authored by Dave Newbold's avatar Dave Newbold
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Addrtab update

parent 7d6ee2d2
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Showing with 9 additions and 9 deletions
components/solid/firmware/hdl/ipbus_decode_sc_seq.vhd
View file @ dc27f6e6
...@@ -17,7 +17,7 @@ package ipbus_decode_sc_seq is ...@@ -17,7 +17,7 @@ package ipbus_decode_sc_seq is
subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0); subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0);
function ipbus_sel_sc_seq(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t; function ipbus_sel_sc_seq(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t;
-- START automatically generated VHDL the Fri Mar 17 13:58:05 2017 -- START automatically generated VHDL the Mon Nov 27 19:15:55 2017
constant N_SLV_BUF: integer := 0; constant N_SLV_BUF: integer := 0;
constant N_SLV_CONF: integer := 1; constant N_SLV_CONF: integer := 1;
constant N_SLV_CTRS: integer := 2; constant N_SLV_CTRS: integer := 2;
...@@ -33,13 +33,13 @@ package body ipbus_decode_sc_seq is ...@@ -33,13 +33,13 @@ package body ipbus_decode_sc_seq is
variable sel: ipbus_sel_t; variable sel: ipbus_sel_t;
begin begin
-- START automatically generated VHDL the Fri Mar 17 13:58:05 2017 -- START automatically generated VHDL the Mon Nov 27 19:15:55 2017
if std_match(addr, "-----------------------------00-") then if std_match(addr, "-----------------------------00-") then
sel := ipbus_sel_t(to_unsigned(N_SLV_BUF, IPBUS_SEL_WIDTH)); -- buf / base 0x00000008 / mask 0x00000006 sel := ipbus_sel_t(to_unsigned(N_SLV_BUF, IPBUS_SEL_WIDTH)); -- buf / base 0x00000000 / mask 0x00000006
elsif std_match(addr, "-----------------------------01-") then elsif std_match(addr, "-----------------------------01-") then
sel := ipbus_sel_t(to_unsigned(N_SLV_CONF, IPBUS_SEL_WIDTH)); -- conf / base 0x0000000a / mask 0x00000006 sel := ipbus_sel_t(to_unsigned(N_SLV_CONF, IPBUS_SEL_WIDTH)); -- conf / base 0x00000002 / mask 0x00000006
elsif std_match(addr, "-----------------------------10-") then elsif std_match(addr, "-----------------------------10-") then
sel := ipbus_sel_t(to_unsigned(N_SLV_CTRS, IPBUS_SEL_WIDTH)); -- ctrs / base 0x0000000c / mask 0x00000006 sel := ipbus_sel_t(to_unsigned(N_SLV_CTRS, IPBUS_SEL_WIDTH)); -- ctrs / base 0x00000004 / mask 0x00000006
-- END automatically generated VHDL -- END automatically generated VHDL
else else
......
components/solid/firmware/hdl/ipbus_decode_sc_trig.vhd
View file @ dc27f6e6
...@@ -17,7 +17,7 @@ package ipbus_decode_sc_trig is ...@@ -17,7 +17,7 @@ package ipbus_decode_sc_trig is
subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0); subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0);
function ipbus_sel_sc_trig(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t; function ipbus_sel_sc_trig(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t;
-- START automatically generated VHDL the Tue Nov 14 21:11:13 2017 -- START automatically generated VHDL the Mon Nov 27 19:15:55 2017
constant N_SLV_CSR: integer := 0; constant N_SLV_CSR: integer := 0;
constant N_SLV_LOC_MASK: integer := 1; constant N_SLV_LOC_MASK: integer := 1;
constant N_SLV_HOP_CFG: integer := 2; constant N_SLV_HOP_CFG: integer := 2;
...@@ -37,7 +37,7 @@ package body ipbus_decode_sc_trig is ...@@ -37,7 +37,7 @@ package body ipbus_decode_sc_trig is
variable sel: ipbus_sel_t; variable sel: ipbus_sel_t;
begin begin
-- START automatically generated VHDL the Tue Nov 14 21:11:13 2017 -- START automatically generated VHDL the Mon Nov 27 19:15:55 2017
if std_match(addr, "--------------------------0000--") then if std_match(addr, "--------------------------0000--") then
sel := ipbus_sel_t(to_unsigned(N_SLV_CSR, IPBUS_SEL_WIDTH)); -- csr / base 0x00000000 / mask 0x0000003c sel := ipbus_sel_t(to_unsigned(N_SLV_CSR, IPBUS_SEL_WIDTH)); -- csr / base 0x00000000 / mask 0x0000003c
elsif std_match(addr, "--------------------------000100") then elsif std_match(addr, "--------------------------000100") then
...@@ -48,8 +48,8 @@ package body ipbus_decode_sc_trig is ...@@ -48,8 +48,8 @@ package body ipbus_decode_sc_trig is
sel := ipbus_sel_t(to_unsigned(N_SLV_ZS_CFG, IPBUS_SEL_WIDTH)); -- zs_cfg / base 0x00000006 / mask 0x0000003f sel := ipbus_sel_t(to_unsigned(N_SLV_ZS_CFG, IPBUS_SEL_WIDTH)); -- zs_cfg / base 0x00000006 / mask 0x0000003f
elsif std_match(addr, "--------------------------00100-") then elsif std_match(addr, "--------------------------00100-") then
sel := ipbus_sel_t(to_unsigned(N_SLV_DTMON, IPBUS_SEL_WIDTH)); -- dtmon / base 0x00000008 / mask 0x0000003e sel := ipbus_sel_t(to_unsigned(N_SLV_DTMON, IPBUS_SEL_WIDTH)); -- dtmon / base 0x00000008 / mask 0x0000003e
elsif std_match(addr, "--------------------------011---") then elsif std_match(addr, "--------------------------010---") then
sel := ipbus_sel_t(to_unsigned(N_SLV_SEQ, IPBUS_SEL_WIDTH)); -- seq / base 0x00000018 / mask 0x00000038 sel := ipbus_sel_t(to_unsigned(N_SLV_SEQ, IPBUS_SEL_WIDTH)); -- seq / base 0x00000010 / mask 0x00000038
elsif std_match(addr, "--------------------------10----") then elsif std_match(addr, "--------------------------10----") then
sel := ipbus_sel_t(to_unsigned(N_SLV_MASKS, IPBUS_SEL_WIDTH)); -- masks / base 0x00000020 / mask 0x00000030 sel := ipbus_sel_t(to_unsigned(N_SLV_MASKS, IPBUS_SEL_WIDTH)); -- masks / base 0x00000020 / mask 0x00000030
-- END automatically generated VHDL -- END automatically generated VHDL
......
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