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euro-adc-65m-14b-40cha-gw
Commit dc0cc16a authored by Dave Newbold's avatar Dave Newbold
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Syntax fix

parent 00de3c0e
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Showing with 2 additions and 2 deletions
components/solid/firmware/hdl/sc_chan.vhd
View file @ dc0cc16a
......@@ -72,7 +72,7 @@ architecture rtl of sc_chan is
signal ctrl_mode, ctrl_src: std_logic_vector(1 downto 0);
signal cap_full, buf_full, dr_full, dr_warn: std_logic;
signal zs_thresh_v: ipb_reg_v(N_ZS_THRESH - 1 downto 0);
signal zs_sel: integer range 2 ** zs_sel'length - 1 downto 0 := 0;
signal zs_sel_i: integer range 2 ** zs_sel'length - 1 downto 0 := 0;
signal zs_thresh: std_logic_vector(13 downto 0);
signal sctr_p: std_logic_vector(11 downto 0);
signal dr_d: std_logic_vector(31 downto 0);
......@@ -167,7 +167,7 @@ begin
-- ZS thresholds
zs_thresh: entity work.ipbus_reg_v
zs_t: entity work.ipbus_reg_v
generic map(
N_REG => N_ZS_THRESH
)
......
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