Adjusting timestamp counters

acdd6b29 · Dave Newbold · 0b20f534 · acdd6b29
Commit acdd6b29 authored Apr 20, 2018 by Dave Newbold
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sc_trig_ro_block.vhd components/solid/firmware/hdl/sc_trig_ro_block.vhd +1 -1

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--- a/components/solid/firmware/hdl/sc_trig_ro_block.vhd
+++ b/components/solid/firmware/hdl/sc_trig_ro_block.vhd
@@ -72,7 +72,7 @@ begin
 	begin
 		if rising_edge(clk40) then
 			if trig_en = '0' then
-				bctr <= 1;
+				bctr <= to_unsigned(1, bctr'length);
 			elsif mark = '1' then
 				bctr <= bctr + 1;
 			end if;