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eurocard
euro-adc-65m-14b-40cha
euro-adc-65m-14b-40cha-gw
Commits
ab3214f1
Commit
ab3214f1
authored
Nov 18, 2017
by
Dave Newbold
Browse files
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Updating scripts
parent
f88a805e
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Showing
10 changed files
with
194 additions
and
79 deletions
+194
-79
Si5345_status.py
projects/64ch/software/Si5345_status.py
+2
-1
align_adc.py
projects/64ch/software/align_adc.py
+3
-3
align_adc_bulk.py
projects/64ch/software/align_adc_bulk.py
+30
-34
check_sync.py
projects/64ch/software/check_sync.py
+2
-1
connections.xml
projects/64ch/software/connections.xml
+10
-0
ro_test.py
projects/64ch/software/ro_test.py
+52
-29
setup.py
projects/64ch/software/setup.py
+4
-7
spi_test.py
projects/64ch/software/spi_test.py
+2
-4
test_links.py
projects/64ch/software/test_links.py
+38
-0
test_links_sim.py
projects/64ch/software/test_links_sim.py
+51
-0
No files found.
projects/64ch/software/Si5345_status.py
View file @
ab3214f1
...
...
@@ -7,7 +7,8 @@ from I2CuHal import I2CCore
from
si5344
import
si5344
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
hw
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.55:50001"
,
"file://addrtab/top.xml"
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
hw
=
manager
.
getDevice
(
sys
.
argv
[
1
])
hw
.
getNode
(
"csr.ctrl.soft_rst"
)
.
write
(
1
)
# Reset ipbus registers
hw
.
dispatch
()
...
...
projects/64ch/software/align_adc.py
100644 → 100755
View file @
ab3214f1
...
...
@@ -34,9 +34,9 @@ def spi_read(spi, addr):
offsets
=
[
0
,
13
,
2
,
1
,
4
,
3
,
6
,
5
,
8
,
7
,
10
,
9
,
12
,
11
]
invert
=
[
0x1d
,
0x1e
,
0x1f
,
0x20
,
0x21
,
0x22
,
0x23
,
0x24
,
0x25
]
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
board
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.62:50001"
,
"file://addrtab/top
.xml"
)
#board = uhal.getDevice("board", "ipbusudp-2.0://192.168.235.16:50001", "file://addrtab/top_sim.xml"
)
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
INFO
)
manager
=
uhal
.
ConnectionManager
(
"file://connections
.xml"
)
board
=
manager
.
getDevice
(
sys
.
argv
[
1
]
)
board
.
getClient
()
.
setTimeoutPeriod
(
10000
)
v
=
board
.
getNode
(
"csr.id"
)
.
read
()
...
...
projects/64ch/software/align_adc_bulk.py
View file @
ab3214f1
...
...
@@ -8,49 +8,52 @@ import collections
sys
.
path
.
append
(
'/home/dsaunder/workspace/go_projects/src/bitbucket.org/solidexperiment/readout-software/scripts/'
)
import
detector_config_tools
def
spi_config
(
spi
,
div
,
ctrl
,
ss
):
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
def
spi_write
(
spi
,
addr
,
data
):
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
def
spi_read
(
spi
,
addr
):
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
offsets
=
[
0
,
13
,
2
,
1
,
4
,
3
,
6
,
5
,
8
,
7
,
10
,
9
,
12
,
11
]
invert
=
[
0x1d
,
0x1e
,
0x1f
,
0x20
,
0x21
,
0x22
,
0x23
,
0x24
,
0x25
]
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
# Db stuff.
ips
=
detector_config_tools
.
currentIPs
(
False
)
ips
=
[
6
2
]
ips
=
[
9
2
]
db
=
dataset
.
connect
(
'mysql://DAQGopher:gogogadgetdatabase@localhost/solid_phase1_running'
)
configID
=
0
#first time case
if
len
(
db
[
'TapSlips'
])
!=
0
:
configID
=
max
(
db
[
'TapSlips'
][
'configID'
])[
'configID'
]
+
1
print
'Bulk scanning ips:'
,
ips
print
'New TapSlips configID'
,
configID
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
for
ith_ip
in
ips
:
ith_slips
,
ith_taps
=
[],
[]
print
'
\n
\n
***********
About to align ip:'
,
ith_ip
print
'
\n
About to align ip:'
,
ith_ip
board
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235."
+
str
(
ith_ip
)
+
":50001"
,
"file://addrtab/top.xml"
)
board
.
getClient
()
.
setTimeoutPeriod
(
10000
)
v
=
board
.
getNode
(
"csr.id"
)
.
read
()
board
.
dispatch
()
...
...
@@ -62,7 +65,7 @@ for ith_ip in ips:
time
.
sleep
(
1
)
chans
=
range
(
0x
40
)
chans
=
range
(
0x
1
)
adcs
=
range
(
0x10
)
patt
=
0x0ff
cap_len
=
0x80
...
...
@@ -92,7 +95,7 @@ for ith_ip in ips:
res
=
[
False
]
*
(
15
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
1
4
):
for
i_slip
in
range
(
1
):
ok
=
False
for
i_tap
in
range
(
32
):
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
...
...
@@ -101,18 +104,11 @@ for ith_ip in ips:
time
.
sleep
(
0.01
)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
print
hex
(
w
),
print
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
c
res
[
offsets
[
i_slip
]
*
taps_per_slip
+
(
31
-
i_tap
)]
=
(
c
==
cap_len
)
ok
=
(
c
==
cap_len
)
or
ok
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
...
...
@@ -145,13 +141,13 @@ for ith_ip in ips:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
a
=
int
((
min
+
max
)
/
2
)
d_slip
=
offsets
.
index
(
a
//
taps_per_slip
)
d_tap
=
a
%
taps_per_slip
print
trp
db
[
'TapSlips'
]
.
insert
({
'configID'
:
int
(
configID
),
'ip'
:
ith_ip
,
'tap'
:
d_tap
,
'slip'
:
d_slip
,
'channel'
:
i_chan
})
ith_slips
.
append
(
d_slip
)
ith_taps
.
append
(
d_tap
)
print
trp
if
not
non_cont
:
print
"Chan, rec_slip, rec_tap:"
,
hex
(
i_chan
),
hex
(
d_slip
),
hex
(
d_tap
)
else
:
...
...
projects/64ch/software/check_sync.py
View file @
ab3214f1
...
...
@@ -8,7 +8,8 @@ from si5344 import si5344
import
time
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
hw
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.50:50001"
,
"file://addrtab/top.xml"
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
hw
=
manager
.
getDevice
(
sys
.
argv
[
1
])
while
True
:
hw
.
getNode
(
"daq.timing.csr.ctrl.cap_ctr"
)
.
write
(
1
)
...
...
projects/64ch/software/connections.xml
0 → 100644
View file @
ab3214f1
<?xml version="1.0" encoding="UTF-8"?>
<connections>
<connection
id=
"MAROC_64CH"
uri=
"ipbusudp-2.0://192.168.235.50:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"SIM"
uri=
"ipbusudp-2.0://192.168.235.16:50001"
address_table=
"file://addrtab/top_sim.xml"
/>
<connection
id=
"BEK_8CH"
uri=
"ipbusudp-2.0://192.168.235.1:50001"
address_table=
"file://addrtab/top_sim.xml"
/>
</connections>
projects/64ch/software/ro_test.py
View file @
ab3214f1
...
...
@@ -6,7 +6,7 @@ import sys
import
collections
def
zsdot
(
i
):
return
' '
if
i
==
0
else
'
!
'
return
' '
if
i
==
0
else
'
*
'
def
zsfmt
(
i
):
return
"
%
s
%
s
%04
x
%
s
%
s
%04
x"
%
(
zsdot
(
i
&
0x8000
),
zsdot
(
i
&
0x4000
),
i
&
0x3fff
,
...
...
@@ -25,13 +25,13 @@ def dump():
print
"Evt_ctr:
%08
x Trig_stat:
%08
x Roc_stat:
%08
x Buf_cnt:
%08
x Roc_tot:
%08
x Chan_stat:
%08
x Wctr:
%08
x"
%
(
int
(
b0
),
int
(
b1
),
int
(
b2
),
int
(
b3
),
int
(
b4
),
int
(
b5
),
int
(
b6
))
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
board
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.50:50001"
,
"file://addrtab/top
.xml"
)
#board = uhal.getDevice("board", "ipbusudp-2.0://192.168.235.16:50001", "file://addrtab/top_sim.xml"
)
manager
=
uhal
.
ConnectionManager
(
"file://connections
.xml"
)
board
=
manager
.
getDevice
(
sys
.
argv
[
1
]
)
board
.
getClient
()
.
setTimeoutPeriod
(
10000
)
v
=
board
.
getNode
(
"csr.id"
)
.
read
()
board
.
dispatch
()
print
hex
(
v
)
print
"Board ID:"
,
hex
(
v
)
board
.
getNode
(
"daq.timing.csr.ctrl.rst"
)
.
write
(
1
)
# Hold clk40 domain in reset
board
.
dispatch
()
...
...
@@ -41,31 +41,54 @@ board.dispatch()
sleep
(
1
)
for
i
in
range
(
8
):
for
i
in
range
(
1
):
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x0
)
# Set to normal DAQ mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to random number generator
board
.
getNode
(
"daq.chan.csr.ctrl.zs_thresh"
)
.
write
(
0x3fff
)
# Set ZS threshold
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x3
)
# Set source to fake data
board
.
getNode
(
"daq.chan.zs_thresh"
)
.
writeBlock
([
0x0
,
0x1
])
# Set ZS thresholds #0 = 0, #1 =1
board
.
getNode
(
"daq.chan.trig_thresh.threshold.thresh"
)
.
write
(
0x1000
)
# Set ctrig 0 threshold
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
getNode
(
"daq.rtrig.ctrl.dist"
)
.
write
(
0x1
)
# Set random trigger generator to interval mode
board
.
getNode
(
"daq.rtrig.ctrl.div"
)
.
write
(
0xa
)
# Set random trigger rate to 40MHz / 2^11 = 20kHz
board
.
getNode
(
"daq.rtrig.ctrl.en"
)
.
write
(
0x1
)
# Enable random trigger generator
board
.
getNode
(
"daq.trig.loc_mask"
)
.
write
(
0x8
)
# Enable trigger type 3 (random trigger)
board
.
getNode
(
"daq.trig.seq.conf.addr"
)
.
write
(
0x3
)
# Set sequencer table to entry 0 (trigger type 0)
board
.
getNode
(
"daq.trig.seq.conf.data"
)
.
write
(
0x00010000
)
# Set offet = 0, block count = 1 for trigger type 0
board
.
getNode
(
"daq.fake.ctrl.mode"
)
.
write
(
0x1
)
# Set fake data to pulse
board
.
getNode
(
"daq.fake.ctrl.samp_lock"
)
.
write
(
0x1
)
# Lock to sample
board
.
getNode
(
"daq.fake.params.freq.freq_div"
)
.
write
(
0x0
)
# Fake pulse once per 4096 samples
board
.
getNode
(
"daq.fake.params.freq.samp"
)
.
write
(
0xfd
)
# pulse on sample 0
board
.
getNode
(
"daq.fake.params.freq.n"
)
.
write
(
0x1
)
# One ping only
board
.
getNode
(
"daq.fake.params.size.level"
)
.
write
(
0x2000
)
# Pulse height
board
.
getNode
(
"daq.fake.params.size.ped"
)
.
write
(
0x0
)
# Pedestal
#board.getNode("daq.rtrig.ctrl.dist").write(0x1) # Set random trigger generator to interval mode
#board.getNode("daq.rtrig.ctrl.div").write(0x3) # Set random trigger rate to 40MHz / 2^11 = 20kHz
#board.getNode("daq.rtrig.ctrl.en").write(0x1) # Enable random trigger generator
#board.getNode("daq.trig.loc_mask").write(0x8) # Enable trigger type 3 (random trigger)
#board.getNode("daq.trig.seq.conf.addr").write(0x3) # Set sequencer table pointer to entry 3 (trigger type 3)
#board.getNode("daq.trig.seq.conf.data").write(0x00010000) # Set offset = 0, block count = 1
board
.
getNode
(
"daq.trig.masks"
)
.
write
(
0x1
)
# Enable ctrig bit 0 for channel 0
board
.
getNode
(
"daq.trig.loc_mask"
)
.
write
(
0x1
)
# Enable trigger type 0 (threshold trigger)
board
.
getNode
(
"daq.trig.seq.conf.addr"
)
.
write
(
0x0
)
# Set sequencer table pointer to entry 0
board
.
getNode
(
"daq.trig.seq.conf.data"
)
.
write
(
0x00040000
)
# Set offset = 0, block count = 4
board
.
getNode
(
"daq.trig.zs_cfg"
)
.
write
(
0x01
)
# Set zs thresh #1 for trigger 0
board
.
getNode
(
"daq.roc.csr.ctrl.en"
)
.
write
(
0x1
)
# Enable readout buffer
board
.
getNode
(
"daq.timing.csr.ctrl.zs_blks"
)
.
write
(
0x2
)
# Configure buffers for two ZS blocks
board
.
getNode
(
"daq.timing.csr.ctrl.pipeline_en"
)
.
write
(
1
)
# Enable front-end pipeline
board
.
getNode
(
"daq.timing.csr.ctrl.force_sync"
)
.
write
(
1
)
# And... go.
board
.
dispatch
()
print
"Started DAQ"
sleep
(
1
)
r
=
list
()
evts
=
0
max_evts
=
8
max_evts
=
16
n_trig
=
4
print
"Firing triggers"
for
i
in
range
(
1
):
board
.
getNode
(
"daq.fake.ctrl.force"
)
.
write
(
0x1
)
board
.
getNode
(
"daq.fake.ctrl.force"
)
.
write
(
0x0
)
board
.
dispatch
()
while
True
:
while
True
:
...
...
@@ -74,8 +97,6 @@ while True:
if
v1
!=
0
:
break
# dump()
b
=
board
.
getNode
(
"daq.roc.buf.data"
)
.
readBlock
(
int
(
v1
))
# Read the buffer contents
board
.
dispatch
()
...
...
@@ -83,7 +104,7 @@ while True:
while
len
(
r
)
>
0
:
m
=
int
(
r
.
pop
(
0
)
)
m
=
int
(
r
[
0
]
)
if
(
m
>>
24
)
!=
0xaa
:
print
"Bad news: event header incorrect"
dump
()
...
...
@@ -93,21 +114,22 @@ while True:
sys
.
exit
()
l
=
m
&
0xffff
if
len
(
r
)
>=
l
:
w0
=
int
(
r
.
pop
(
0
))
print
hex
(
w0
)
rtype
=
(
w
0
>>
28
)
print
"Readout type
%
d Len
%04
x"
%
(
rtype
,
l
)
w0
=
int
(
r
.
pop
(
0
))
w1
=
int
(
r
.
pop
(
0
)
)
rtype
=
(
w
1
>>
28
)
print
"Shop! w0:
%08
x w1:
%08
x ro_type:
%
d len:
%04
x"
%
(
w0
,
w1
,
rtype
,
l
)
if
rtype
==
0
:
# A data block
bctr
=
w
0
&
0xffffff
bctr
=
w
1
&
0xffffff
tstamp
=
int
(
r
.
pop
(
0
))
|
(
int
(
r
.
pop
(
0
))
<<
32
)
mask
=
int
(
r
.
pop
(
0
))
|
int
(
r
.
pop
(
0
))
>>
32
for
_
in
range
(
2
):
r
.
pop
(
0
)
c
=
bin
(
mask
)
.
count
(
'1'
)
print
"
\t
Block
%08
x Time
%012
x Mask
%016
x Chans
%02
x"
%
(
bctr
,
tstamp
,
mask
,
c
)
print
"
\t
ctr:
%08
x time:
%012
x mask:
%016
x chans:
%02
x"
%
(
bctr
,
tstamp
,
mask
,
c
)
tcnt
=
0
for
i
in
range
(
c
):
print
"
%04
x"
%
0
,
print
"
\t
chan
%02
x"
%
(
i
)
print
"
\t\t
%04
x"
%
0
,
cnt
=
0
zcnt
=
0
while
True
:
...
...
@@ -124,11 +146,11 @@ while True:
zcnt
+=
((
g
&
0x3fff0000
)
>>
16
)
print
zsfmt
(
g
),
if
cnt
%
8
==
0
:
print
"
\n
%04
x"
%
cnt
,
print
"
\n
\t\t
%04
x"
%
cnt
,
if
g
&
0x80008000
!=
0
:
print
break
;
print
"
\t\t
Chan
%02
x"
%
i
,
"Len:
%04
x"
%
cnt
,
"Z
len:
%04
x"
%
zcnt
print
"
\t\t
len:
%04
x"
%
cnt
,
"z
len:
%04
x"
%
zcnt
if
zcnt
!=
0x100
:
print
"Bad news: chan
%02
x zcnt is
%04
x"
%
(
i
,
zcnt
)
dump
()
...
...
@@ -140,11 +162,12 @@ while True:
if
evts
>=
max_evts
:
sys
.
exit
()
elif
rtype
==
1
:
# A trigger block
ttype
=
w
0
&
0x3ffff
ttype
=
w
1
&
0x3ffff
tstamp
=
int
(
r
.
pop
(
0
))
|
(
int
(
r
.
pop
(
0
))
<<
32
)
for
_
in
range
(
2
*
n_trig
+
1
):
print
hex
(
r
.
pop
(
0
))
print
"
\t
Tbits
%08
x Time
%012
x"
%
(
ttype
,
tstamp
)
# print hex(r.pop(0))
r
.
pop
(
0
)
print
"
\t
tbits:
%08
x time:
%012
x"
%
(
ttype
,
tstamp
)
else
:
print
"Unknown readout type"
sys
.
exit
()
...
...
projects/64ch/software/setup.py
View file @
ab3214f1
...
...
@@ -7,7 +7,8 @@ from I2CuHal import I2CCore
from
si5344
import
si5344
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
INFO
)
hw
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.62:50001"
,
"file://addrtab/top.xml"
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
hw
=
manager
.
getDevice
(
sys
.
argv
[
1
])
hw
.
getNode
(
"csr.ctrl.soft_rst"
)
.
write
(
1
)
# Reset ipbus registers
hw
.
dispatch
()
...
...
@@ -28,11 +29,8 @@ fq = hw.getNode("io.freq_ctr.freq.count").read();
fv
=
hw
.
getNode
(
"io.freq_ctr.freq.valid"
)
.
read
();
hw
.
dispatch
()
print
"Freq:"
,
int
(
fv
),
int
(
fq
)
*
119.20928
/
1000000
;
#hw.getNode("daq.timing.csr.ctrl.en_ext_sync").write(1)
'''
f_lock = hw.getNode("csr.stat.mmcm_locked").read();
hw.dispatch()
print "csr.stat.mmcm_lock", hex(f_lock)
hw
.
getNode
(
"daq.timing.csr.ctrl.en_ext_sync"
)
.
write
(
1
)
f_stat
=
hw
.
getNode
(
"csr.stat"
)
.
read
();
hw
.
dispatch
()
...
...
@@ -50,4 +48,3 @@ print "daq.trig.csr.stat", hex(f_ctrl_2)
fw
=
hw
.
getNode
(
"daq.timing.csr.stat.wait_sync"
)
.
read
();
hw
.
dispatch
()
print
"wait_sync, sync_err:"
,
int
(
fw
)
'''
projects/64ch/software/spi_test.py
View file @
ab3214f1
...
...
@@ -7,10 +7,8 @@ import random
from
I2CuHal
import
I2CCore
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
hw
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.50:50001"
,
"file://addrtab/top.xml"
)
#hw.getNode("csr.ctrl.soft_rst").write(1) # Reset ipbus registers
#hw.dispatch()
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
hw
=
manager
.
getDevice
(
sys
.
argv
[
1
])
spi
=
hw
.
getNode
(
"io.spi"
)
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
...
...
projects/64ch/software/test_links.py
0 → 100755
View file @
ab3214f1
#!/usr/bin/python
import
uhal
import
time
import
sys
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
hw
=
manager
.
getDevice
(
sys
.
argv
[
1
])
v
=
hw
.
getNode
(
"csr.id"
)
.
read
();
hw
.
dispatch
()
print
"csr.id"
,
hex
(
v
)
vu
=
hw
.
getNode
(
"daq.tlink.us_stat"
)
.
read
()
vd
=
hw
.
getNode
(
"daq.tlink.ds_stat"
)
.
read
()
hw
.
dispatch
()
print
"us, ds:"
,
hex
(
vu
),
hex
(
vd
)
hw
.
getNode
(
"daq.tlink.ctrl.rst_tx"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.rst_rx"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.en_us"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.en_ds"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.loop_us"
)
.
write
(
0x2
)
hw
.
getNode
(
"daq.tlink.ctrl.loop_ds"
)
.
write
(
0x2
)
hw
.
dispatch
()
hw
.
getNode
(
"daq.tlink.ctrl.rst_tx"
)
.
write
(
0
)
hw
.
getNode
(
"daq.tlink.ctrl.rst_rx"
)
.
write
(
0
)
hw
.
dispatch
()
time
.
sleep
(
1
)
vu
=
hw
.
getNode
(
"daq.tlink.us_stat"
)
.
read
()
vd
=
hw
.
getNode
(
"daq.tlink.ds_stat"
)
.
read
()
hw
.
dispatch
()
print
"us, ds:"
,
hex
(
vu
),
hex
(
vd
)
projects/64ch/software/test_links_sim.py
0 → 100755
View file @
ab3214f1
#!/usr/bin/python
import
uhal
import
time
import
sys
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
hw
=
manager
.
getDevice
(
sys
.
argv
[
1
])
hw
.
getNode
(
"daq.timing.csr.ctrl.rst"
)
.
write
(
1
)
# Hold clk40 domain in reset
hw
.
dispatch
()
hw
.
getNode
(
"csr.ctrl.soft_rst"
)
.
write
(
1
)
# Reset ipbus registers
hw
.
dispatch
()
v
=
hw
.
getNode
(
"csr.id"
)
.
read
();
hw
.
dispatch
()
print
"csr.id"
,
hex
(
v
)
hw
.
getNode
(
"daq.timing.csr.ctrl.cap_ctr"
)
.
write
(
1
)
hw
.
getNode
(
"daq.timing.csr.ctrl.cap_ctr"
)
.
write
(
0
)
sl
=
hw
.
getNode
(
"daq.timing.csr.sctr_l"
)
.
read
()
sh
=
hw
.
getNode
(
"daq.timing.csr.sctr_h"
)
.
read
()
hw
.
dispatch
()
print
"Counter:"
,
hex
(
int
(
sh
)
<<
32
+
int
(
sl
))
vu
=
hw
.
getNode
(
"daq.tlink.us_stat"
)
.
read
()
vd
=
hw
.
getNode
(
"daq.tlink.ds_stat"
)
.
read
()
hw
.
dispatch
()
print
"us, ds:"
,
hex
(
vu
),
hex
(
vd
)
hw
.
getNode
(
"daq.tlink.ctrl.rst_tx"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.rst_rx"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.en_us"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.en_ds"
)
.
write
(
1
)
hw
.
getNode
(
"daq.tlink.ctrl.loop_us"
)
.
write
(
0x2
)
hw
.
getNode
(
"daq.tlink.ctrl.loop_ds"
)
.
write
(
0x2
)
hw
.
dispatch
()
hw
.
getNode
(
"daq.tlink.ctrl.rst_tx"
)
.
write
(
0
)
hw
.
getNode
(
"daq.tlink.ctrl.rst_rx"
)
.
write
(
0
)
hw
.
dispatch
()
time
.
sleep
(
1
)
vu
=
hw
.
getNode
(
"daq.tlink.us_stat"
)
.
read
()
vd
=
hw
.
getNode
(
"daq.tlink.ds_stat"
)
.
read
()
hw
.
dispatch
()
print
"us, ds:"
,
hex
(
vu
),
hex
(
vd
)
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