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euro-adc-65m-14b-40cha-gw
Commit 986f9973 authored by Dave Newbold's avatar Dave Newbold
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Addr table update

parent a018f909
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Showing with 4 additions and 4 deletions
components/solid/firmware/hdl/ipbus_decode_sc_daq.vhd
View file @ 986f9973
......@@ -17,7 +17,7 @@ package ipbus_decode_sc_daq is
subtype ipbus_sel_t is std_logic_vector(IPBUS_SEL_WIDTH - 1 downto 0);
function ipbus_sel_sc_daq(addr : in std_logic_vector(31 downto 0)) return ipbus_sel_t;
-- START automatically generated VHDL the Thu Jun 15 20:45:58 2017
-- START automatically generated VHDL the Thu Oct 19 13:25:12 2017
constant N_SLV_CHAN: integer := 0;
constant N_SLV_TIMING: integer := 1;
constant N_SLV_FAKE: integer := 2;
......@@ -37,11 +37,11 @@ package body ipbus_decode_sc_daq is
variable sel: ipbus_sel_t;
begin
-- START automatically generated VHDL the Thu Jun 15 20:45:58 2017
-- START automatically generated VHDL the Thu Oct 19 13:25:12 2017
if std_match(addr, "-------------------------000----") then
sel := ipbus_sel_t(to_unsigned(N_SLV_CHAN, IPBUS_SEL_WIDTH)); -- chan / base 0x00000000 / mask 0x00000070
elsif std_match(addr, "-------------------------0010---") then
sel := ipbus_sel_t(to_unsigned(N_SLV_TIMING, IPBUS_SEL_WIDTH)); -- timing / base 0x00000010 / mask 0x00000078
elsif std_match(addr, "-------------------------001----") then
sel := ipbus_sel_t(to_unsigned(N_SLV_TIMING, IPBUS_SEL_WIDTH)); -- timing / base 0x00000010 / mask 0x00000070
elsif std_match(addr, "-------------------------0100---") then
sel := ipbus_sel_t(to_unsigned(N_SLV_FAKE, IPBUS_SEL_WIDTH)); -- fake / base 0x00000020 / mask 0x00000078
elsif std_match(addr, "-------------------------0101---") then
......
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