Commit 893ea6bc authored by Dave Newbold's avatar Dave Newbold

Fixing ZS

parent af13dd79
...@@ -193,9 +193,9 @@ begin ...@@ -193,9 +193,9 @@ begin
zs_sel_i <= to_integer(unsigned(zs_sel)); -- Might need pipelining here zs_sel_i <= to_integer(unsigned(zs_sel)); -- Might need pipelining here
process(clk) process(clk40)
begin begin
if rising_edge(clk) and blkend = '1' then if rising_edge(clk40) and blkend = '1' then
if zs_sel_i < N_ZS_THRESH then if zs_sel_i < N_ZS_THRESH then
zs_thresh <= zs_thresh_v(zs_sel_i)(13 downto 0); zs_thresh <= zs_thresh_v(zs_sel_i)(13 downto 0);
else else
......
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