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euro-adc-65m-14b-40cha-gw
Commit 641beccc authored by Dave Newbold's avatar Dave Newbold
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Adding coinc to sim

parent e1c8e642
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Showing with 13 additions and 1 deletion
projects/8ch/firmware/hdl/top_decl.vhd
View file @ 641beccc
......@@ -25,5 +25,11 @@ package top_decl is
type sc_trig_array is array(N_CHAN_TRG - 1 downto 0) of std_logic_vector(N_CHAN - 1 downto 0);
type sc_ltrig_array is array(N_TRG - 1 downto 0) of std_logic_vector(N_CHAN - 1 downto 0);
type sc_ch_array_t is array(N_CHAN / 4 - 1 downto 0) of integer;
constant SC_CH_Y0: sc_ch_array_t := (0, 1);
constant SC_CH_Y1: sc_ch_array_t := (2, 3);
constant SC_CH_X0: sc_ch_array_t := (4, 5);
constant SC_CH_X1: sc_ch_array_t := (6, 7);
end top_decl;
projects/8ch/firmware/sim_hdl/top_decl.vhd
View file @ 641beccc
......@@ -13,7 +13,7 @@ package top_decl is
constant IP_ADDR: std_logic_vector(31 downto 0) := X"c0a8eb10";
constant FW_REV: std_logic_vector(15 downto 0) := X"010d";
constant N_CHAN: integer := 2;
constant N_CHAN: integer := 4;
constant BLK_RADIX: integer := 8; -- 256 sample blocks
constant BUF_RADIX: integer := 11; -- One BRAM for NZS / ZS buffer
constant NZS_BLKS: integer := 2; -- Reserve two blocks of space for NZS buffer
......@@ -26,4 +26,10 @@ package top_decl is
type sc_trig_array is array(N_CHAN_TRG - 1 downto 0) of std_logic_vector(N_CHAN - 1 downto 0);
type sc_ltrig_array is array(N_TRG - 1 downto 0) of std_logic_vector(N_CHAN - 1 downto 0);
type sc_ch_array_t is array(N_CHAN / 4 - 1 downto 0) of integer;
constant SC_CH_Y0: sc_ch_array_t := (0);
constant SC_CH_Y1: sc_ch_array_t := (2);
constant SC_CH_X0: sc_ch_array_t := (4);
constant SC_CH_X1: sc_ch_array_t := (6);
end top_decl;
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