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euro-adc-65m-14b-40cha-gw
Commit 364f7c32 authored by Dave Newbold's avatar Dave Newbold
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Tidying code

parent fb0b8f13
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components/solid/software/si5344.py
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......@@ -56,6 +56,7 @@ class si5344:
def writeConfiguration(self, regSettingList):
for item in regSettingList:
self.writeRegister(int(item[0], 16), [int(item[1], 16)])
print item[0], item[1]
for item in regSettingList:
d = self.readRegister(int(item[0], 16), 1)
if int(item[1], 16) != int(d):
......
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