Commit 29f2b6c3 authored by Henrique Silva's avatar Henrique Silva

Create different linker scripts for application and bootloader binaries

Now the bootloder region starts at 0x00 and goes up to 0x2000 (8kB).
The application code begins at 0x2000 and ends at 0x10000 (56kB).
There's also a spare region in the last 2 sectors from 0x10000 to
0x11FFF reserved for firmware upgrade.
The last word of the application areas (upgrade and active) is the
firmware id.
parent 978e8e81
...@@ -67,10 +67,6 @@ set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${CMAKE_BUILD_FLAGS} ${CMAKE_ERROR ...@@ -67,10 +67,6 @@ set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${CMAKE_BUILD_FLAGS} ${CMAKE_ERROR
set(CMAKE_C_FLAGS_DEBUG "-O0 -g3 -DDEBUG") set(CMAKE_C_FLAGS_DEBUG "-O0 -g3 -DDEBUG")
set(CMAKE_C_FLAGS_RELEASE "-O3") set(CMAKE_C_FLAGS_RELEASE "-O3")
# Linker flags
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -T ${CMAKE_SOURCE_DIR}/linker/lpc1764.ld -Wl,-Map=${CMAKE_SOURCE_DIR}/linker/afcipm.map")
set(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "")
# When we break up long strings in CMake we get semicolon # When we break up long strings in CMake we get semicolon
# separated lists, undo this here... # separated lists, undo this here...
string(REGEX REPLACE ";" " " CMAKE_C_FLAGS "${CMAKE_C_FLAGS}") string(REGEX REPLACE ";" " " CMAKE_C_FLAGS "${CMAKE_C_FLAGS}")
...@@ -100,6 +96,17 @@ set_target_properties(${CMAKE_PROJECT_NAME} PROPERTIES COMPILE_FLAGS ${MODULES_F ...@@ -100,6 +96,17 @@ set_target_properties(${CMAKE_PROJECT_NAME} PROPERTIES COMPILE_FLAGS ${MODULES_F
add_executable(bootloader ${BOOT_SRCS} ${LPC17_SRCS}) add_executable(bootloader ${BOOT_SRCS} ${LPC17_SRCS})
# Linker flags
set(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "")
set_target_properties(${CMAKE_PROJECT_NAME} PROPERTIES
SUFFIX ".axf"
LINK_FLAGS "-T ${CMAKE_SOURCE_DIR}/linker/lpc1764_app.ld -Wl,-Map=${CMAKE_SOURCE_DIR}/linker/lpc1764_app.map" )
set_target_properties(bootloader PROPERTIES
SUFFIX ".axf"
LINK_FLAGS "-T ${CMAKE_SOURCE_DIR}/linker/lpc1764_boot.ld -Wl,-Map=${CMAKE_SOURCE_DIR}/linker/lpc1764_boot.map")
# Headers path # Headers path
target_include_directories(${CMAKE_PROJECT_NAME} PUBLIC ${PROJ_HDRS}) target_include_directories(${CMAKE_PROJECT_NAME} PUBLIC ${PROJ_HDRS})
target_include_directories(bootloader PUBLIC ${PROJ_HDRS}) target_include_directories(bootloader PUBLIC ${PROJ_HDRS})
......
MEMORY
{
/* Define each memory region */
/* First 8kB are reserved for bootloader */
/* Last 2 sectors (32kB each) are reserved for firmware upgrade */
MFlash128 (rx) : ORIGIN = 0x2000, LENGTH = 0xE000 /* 56K bytes */
RamLoc16 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x4000 /* 16K bytes */
RamAHB16 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x4000 /* 16K bytes */
}
/* Define a symbol for the top of each memory region */
__top_MFlash128 = 0x2000 + 0xE000;
__top_RamLoc16 = 0x10000000 + 0x4000;
__top_RamAHB16 = 0x2007c000 + 0x4000;
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
} >MFlash128
.text : ALIGN(4)
{
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
/* . = ALIGN(4); */
} > MFlash128
.ipmi_handlers : ALIGN(32)
{
_ipmi_handlers = .;
KEEP(*(.ipmi_handlers))
_eipmi_handlers = .;
} > MFlash128
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash128
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > MFlash128
__exidx_end = .;
_etext = .;
/* DATA section for RamAHB16 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$RamAHB16)
*(.data.$RAM2*)
*(.data.$RamAHB16*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
} > RamAHB16 AT>MFlash128
/* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc16
/* Main DATA section (RamLoc16) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
*(vtable)
*(.ramfunc*)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
} > RamLoc16 AT>MFlash128
/* BSS section for RamAHB16 */
.bss_RAM2 : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
*(.bss.$RAM2*)
*(.bss.$RamAHB16*)
. = ALIGN(4) ;
PROVIDE(__end_bss_RAM2 = .) ;
} > RamAHB16
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > RamLoc16
/* NOINIT section for RamAHB16 */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
*(.noinit_RAM2*)
*(.noinit_RamAHB16*)
. = ALIGN(4) ;
} > RamAHB16
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
} > RamLoc16
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc16 - 0);
}
/* MEMORY
* GENERATED FILE - DO NOT EDIT {
* (c) Code Red Technologies Ltd, 2008-13 /* Define each memory region */
* (c) NXP Semiconductors 2013-2015 /* First 8kB are reserved for bootloader */
* Generated linker script file for LPC1764 MFlash128 (rx) : ORIGIN = 0x0000, LENGTH = 0x2000 /* 8K bytes */
* Created from generic_c.ld (7.8.0 ()) RamLoc16 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x4000 /* 16K bytes */
* By LPCXpresso v7.8.0 [Build 426] [2015-05-28] on Thu Jul 30 09:03:05 BRT 2015 RamAHB16 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x4000 /* 16K bytes */
*/ }
/* Define a symbol for the top of each memory region */
/* Memory spaces definitions */ __top_MFlash128 = 0x0000 + 0x2000;
INCLUDE "linker/lpc1764_mem.ld" __top_RamLoc16 = 0x10000000 + 0x4000;
__top_RamAHB16 = 0x2007c000 + 0x4000;
ENTRY(ResetISR) ENTRY(ResetISR)
...@@ -42,7 +43,6 @@ SECTIONS ...@@ -42,7 +43,6 @@ SECTIONS
__section_table_end = . ; __section_table_end = . ;
/* End of Global Section Table */ /* End of Global Section Table */
*(.after_vectors*) *(.after_vectors*)
} >MFlash128 } >MFlash128
...@@ -73,13 +73,6 @@ SECTIONS ...@@ -73,13 +73,6 @@ SECTIONS
_etext = .; _etext = .;
.ipmi_handlers : ALIGN(4)
{
_ipmi_handlers = .;
KEEP(*(.ipmi_handlers))
_eipmi_handlers = .;
} > MFlash128
/* DATA section for RamAHB16 */ /* DATA section for RamAHB16 */
.data_RAM2 : ALIGN(4) .data_RAM2 : ALIGN(4)
{ {
...@@ -95,7 +88,6 @@ SECTIONS ...@@ -95,7 +88,6 @@ SECTIONS
/* MAIN DATA SECTION */ /* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4) .uninit_RESERVED : ALIGN(4)
{ {
KEEP(*(.bss.$RESERVED*)) KEEP(*(.bss.$RESERVED*))
...@@ -103,7 +95,6 @@ SECTIONS ...@@ -103,7 +95,6 @@ SECTIONS
_end_uninit_RESERVED = .; _end_uninit_RESERVED = .;
} > RamLoc16 } > RamLoc16
/* Main DATA section (RamLoc16) */ /* Main DATA section (RamLoc16) */
.data : ALIGN(4) .data : ALIGN(4)
{ {
......
/*
* GENERATED FILE - DO NOT EDIT
* (c) Code Red Technologies Ltd, 2008-2015
* (c) NXP Semiconductors 2013-2015
* Linker script memory definitions
* Created from LinkMemoryTemplate
* By LPCXpresso v7.8.0 [Build 426] [2015-05-28] on Thu Jul 30 09:03:05 BRT 2015)
*/
MEMORY
{
/* Define each memory region */
MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes */
RamLoc16 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x4000 /* 16K bytes */
RamAHB16 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x4000 /* 16K bytes */
}
/* Define a symbol for the top of each memory region */
__top_MFlash128 = 0x0 + 0x20000;
__top_RamLoc16 = 0x10000000 + 0x4000;
__top_RamAHB16 = 0x2007c000 + 0x4000;
# Build microcontroller-specific sources # Build microcontroller-specific sources
if(${TARGET_CONTROLLER} MATCHES "(lpc17)") if(${TARGET_CONTROLLER} MATCHES "^(lpc|LPC)17")
set(LPC17XX_PATH ${CMAKE_CURRENT_SOURCE_DIR}/nxp/lpc17xx) set(LPC17XX_PATH ${CMAKE_CURRENT_SOURCE_DIR}/nxp/lpc17xx)
set(LPCOPEN_SRCPATH ${LPC17XX_PATH}/lpcopen/src) set(LPCOPEN_SRCPATH ${LPC17XX_PATH}/lpcopen/src)
set(LPCOPEN_INCPATH ${LPC17XX_PATH}/lpcopen/inc) set(LPCOPEN_INCPATH ${LPC17XX_PATH}/lpcopen/inc)
...@@ -11,6 +11,9 @@ if(${TARGET_CONTROLLER} MATCHES "(lpc17)") ...@@ -11,6 +11,9 @@ if(${TARGET_CONTROLLER} MATCHES "(lpc17)")
${LPC17XX_PATH}/lpc17_i2c.c ${LPC17XX_PATH}/lpc17_i2c.c
${LPC17XX_PATH}/lpc17_spi.c ${LPC17XX_PATH}/lpc17_spi.c
${LPC17XX_PATH}/lpc17_ssp.c ${LPC17XX_PATH}/lpc17_ssp.c
)
set(LPC17_SRCS ${LPC17_SRCS}
${LPC17XX_PATH}/sysinit.c ${LPC17XX_PATH}/sysinit.c
${LPC17XX_PATH}/cr_startup_lpc175x_6x.c ${LPC17XX_PATH}/cr_startup_lpc175x_6x.c
) )
...@@ -43,4 +46,5 @@ if(${TARGET_CONTROLLER} MATCHES "(lpc17)") ...@@ -43,4 +46,5 @@ if(${TARGET_CONTROLLER} MATCHES "(lpc17)")
endif() endif()
set(PROJ_SRCS ${PROJ_SRCS} PARENT_SCOPE) set(PROJ_SRCS ${PROJ_SRCS} PARENT_SCOPE)
set(LPC17_SRCS ${LPC17_SRCS} PARENT_SCOPE)
set(PROJ_HDRS ${PROJ_HDRS} PARENT_SCOPE) set(PROJ_HDRS ${PROJ_HDRS} PARENT_SCOPE)
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