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Software for White Rabbit PTP Core
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Software for White Rabbit PTP Core
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26a5ef17
Commit
26a5ef17
authored
Mar 04, 2021
by
Adam Wujek
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boards/generic: update offsets for riscv
Signed-off-by:
Adam Wujek
<
adam.wujek@creotech.pl
>
parent
335cff16
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#1024
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in 34 seconds
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board.h
boards/generic/board.h
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boards/generic/board.h
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26a5ef17
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@@ -13,15 +13,24 @@
* when wrpc-sw is build for wrc (node) -- as opposed to wrs (switch)
*/
#ifdef CONFIG_ARCH_RISCV
#define DEV_BASE 0x80000000
#elif defined CONFIG_ARCH_LM32
#define DEV_BASE 0x40000
#else
#error (Wrong Arch!)
#endif
/* Fixed base addresses */
#define BASE_MINIC 0x40000
#define BASE_EP 0x40100
#define BASE_SOFTPLL 0x40200
#define BASE_PPS_GEN 0x40300
#define BASE_SYSCON 0x40400
#define BASE_UART 0x40500
#define BASE_ONEWIRE 0x40600
#define BASE_ETHERBONE_CFG 0x48000
#define BASE_MINIC (DEV_BASE + 0x000)
#define BASE_EP (DEV_BASE + 0x100)
#define BASE_SOFTPLL (DEV_BASE + 0x200)
#define BASE_PPS_GEN (DEV_BASE + 0x300)
#define BASE_SYSCON (DEV_BASE + 0x400)
#define BASE_UART (DEV_BASE + 0x500)
#define BASE_ONEWIRE (DEV_BASE + 0x600)
#define BASE_ETHERBONE_CFG (DEV_BASE + 0x8000)
/* Board-specific parameters */
#define TICS_PER_SECOND 1000
...
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