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# Software for White Rabbit PTP Core
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UNDER
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CONSTRUCTION
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UNDER CONSTRUCTION
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White Rabbit PTP Core(WRPC) Software runs on a Lattice Mico 32 soft-core
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processor implemented as part of [WRPC
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Gateware](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-core). It is
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responsible for controlling all HDL modules and performing WR time
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synchronization in WR Slave, WR Master or WR Grandmaster mode. To
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compile the software you need to download the [LatticeMico32 cross
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compiler](https://www.ohwr.org/project/wr-cores/uploads/a2e8eeba448fbc8d580e68004e6f6c7f/lm32.tar.xz)
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The structure of WRPC software is presented in figure 1. It consists of:
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- *WR PTP engine* - PTPv2 daemon with WR extensions modified to run on
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simple processor without operating system. Offialy used and
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supported now is
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[ptp\_noposix](https://www.ohwr.org/project/ptp-noposix) daemon, but
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we are currently testing and will start using soon new
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[ppsi](https://www.ohwr.org/project/ppsi) daemon. At the moment user
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can select which engine to use at the compilation time (by default
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*ptp noposix*).
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- *t24p calibrator* - automated calibration procedure for measuring
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t2/t4 phase transition value
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- *SoftPLL* - software implementation of PLLs
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- *User Shell* - basic shell provides commands for configuring and
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monitoring the operation of the WRPC ([list of shell
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commands](https://www.ohwr.org/project/wr-cores/wikis/Wrpc-shell))
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- *IPv4, ICMP, Bootp, ARP* - optional protocols' implementation needed
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to support [Etherbone
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core](https://www.ohwr.org/project/etherbone-core) (by default
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disabled)
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- *HDL/device drivers* - low level functions for accessing HDL modules
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of WRPC Gateware and devices on-board:
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- *EEPROM* - read/write operations through I2C or 1-Wire
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(depending on build configuration) on EEPROM storing SFP
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database and init script or EEPROM inside the SFP transceiver
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- *DS1820* - reading temperature of the board from DS1820 digital
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thermometer through 1-Wire interface
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- *Syscon* - driver for *SysCon* HDL module, providing access to
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internal timer and GPIO lines for driving LEDs or bitbanging I2C
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interfaces
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- *PPS-gen* - driver for *PPSgen* HDL module generating 1-PPS
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signal aligned with the WR time and storing seconds/nanoseconds
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counters for keeping current WR time
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- *Pfilter* - instructions programmed into packet filter inside
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the *Endpoint* describing the rules for various classes based on
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Ethernet frame header content
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- *Endpoint* - driver for *Endpoint* HDL module which is the
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implementation of Ethernet MAC
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- *Minic* - driver for Mini Network Interface Controller
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responsible for sending and receiving Ethernet frames
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- *UART* - driver for physical and virtual UART through which user
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interacts with WR PTP Core
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shell
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*Fig1: White Rabbit PTP Core Software structure**
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-----
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| ... | ... | @@ -46,6 +98,8 @@ CONSTRUCTION |
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-----
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Grzegorz Daniluk, 18 September 2013
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### Files
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